Received: by 2002:ac0:a581:0:0:0:0:0 with SMTP id m1-v6csp3327946imm; Sun, 1 Jul 2018 18:43:59 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJ12ySkTIA+fht6agYljHuw1BczLOwsD0s8JK2fruIHh2dh/FhU6pIbup9hd+MW/oAYsG+1 X-Received: by 2002:a65:4849:: with SMTP id i9-v6mr20043820pgs.350.1530495839785; Sun, 01 Jul 2018 18:43:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530495839; cv=none; d=google.com; s=arc-20160816; b=se9w5i0q82qE2ITIs1LmHQNJRUr+v70SiB9KafT2FiyOssxlUD0f3FhjV6TxWInG76 S+EwMv9HicEKjZC2k2WGHJds6/JZSA6RGSGktj+s2jR0S9VmhUnJ25SjC+q0DcgnAyyL qvnTnihJB6EdRlReu4YALAHKTdwqnFc3yT3i0eVzwRj4SJ7zifmUJ/qabrU2Hf9V5AvZ Oe2mbUkw0MV6+5cuU41I2mbT6u8oAlXoAlgg7zaPfgjoSDHx5AQ/5VlcZvlfD/YqJF3y Y6u7MKNTm28ojlFGSnoGm5Fk3eeD92nAIbS220ctXNJsv3P8gUZ8IgPIXLKOtgcuP1nn b5uA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature:dkim-filter :arc-authentication-results; bh=97hUKQDK73fpqx1i3Mtz5NbC2U0FKM4MGoqXyCZFltM=; b=hzTT5WQSPDye3qwy63PPKIrK+vvY6HCC/ghP5ghmEpIsTC9xXaTCABSlZmzPsa+Ca5 dlzdZbN6cHlT+KYMvnRo07LiTW3yNQqjSwBlClbSW1vfIUZOejHAhfOFP+uHU42HbUaF qAwiSKsk50MnHKMAdQRow0YRE0OxY4FUvwQp8dioIXC+5F6PGOfyCf8fTI0WvraHonx9 H9YaMysc8OLulMBKL6Nwh/dNwE7My4+e+AgG9mq5WAIaBdA36DiP9hQCeZuV6nquDLqG 8/qxRMQIH/DQkO5/1HzZt/4Q8OhO4b6NctNwMbcAwgeUrL6Zh20u/LNinYVtCCxA9UUP TfCA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=wIg1P4ba; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q11-v6si14760325pll.10.2018.07.01.18.43.45; Sun, 01 Jul 2018 18:43:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=wIg1P4ba; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932783AbeGBBgO (ORCPT + 99 others); Sun, 1 Jul 2018 21:36:14 -0400 Received: from conssluserg-06.nifty.com ([210.131.2.91]:43324 "EHLO conssluserg-06.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932179AbeGBBgK (ORCPT ); Sun, 1 Jul 2018 21:36:10 -0400 Received: from mail-vk0-f45.google.com (mail-vk0-f45.google.com [209.85.213.45]) (authenticated) by conssluserg-06.nifty.com with ESMTP id w621a3Lx031880; Mon, 2 Jul 2018 10:36:04 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conssluserg-06.nifty.com w621a3Lx031880 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1530495365; bh=97hUKQDK73fpqx1i3Mtz5NbC2U0FKM4MGoqXyCZFltM=; h=In-Reply-To:References:From:Date:Subject:To:Cc:From; b=wIg1P4ba8WiJqppm1qSBQn9/nGRYMsdDUrCpyicNcCullUthtKDsG9qjuXXlbmSvH TSIY4YKrWBQpfjqcl7IvDKHskKHiZrR1k/y0LGN2boyeahO1g3hoqV/68eVVpfGyIH f6MtiR5C+oCiJeCKJFhlqejncN9DRZXsUFeglh875xTC5w75AwLEqlTzlVNgFlvQ4M GpFQ84usVMlJD90QWXxEd36Pkc5F1C5v9jUDWABMj1T1lmMR3wGvdtrAPm5rZwoCzW F9xWTXVsfd2ge1A3sLtS6Rfb56xwMacSFSzk2JVNBq/834I35+IpcogFm+PFl5jXg/ ixHCF1wvkKNqQ== X-Nifty-SrcIP: [209.85.213.45] Received: by mail-vk0-f45.google.com with SMTP id l189-v6so3755609vke.1; Sun, 01 Jul 2018 18:36:04 -0700 (PDT) X-Gm-Message-State: APt69E0FHACu1xng2Ja3uVXnkfuUH6v6KUU4Vf6hFOYSI0XHDJLV3G0f tyxH5wVCEPwxFzs/wlgmMP97Q78SD4oubgKUyT8= X-Received: by 2002:a1f:88:: with SMTP id 130-v6mr13839412vka.154.1530495363431; Sun, 01 Jul 2018 18:36:03 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:ab0:3308:0:0:0:0:0 with HTTP; Sun, 1 Jul 2018 18:35:22 -0700 (PDT) In-Reply-To: <333ae81b-af62-ec2e-3311-5487b1cc90c1@kernel.org> References: <20180619120719.26921-1-richard@nod.at> <3320422.EJ8D6C0VHL@blindfold> <20180625165506.484e025f@bbrezillon> <20180626200928.29aca979@xps13> <333ae81b-af62-ec2e-3311-5487b1cc90c1@kernel.org> From: Masahiro Yamada Date: Mon, 2 Jul 2018 10:35:22 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] arm: dts: socfpga: denali needs nand_x_clk too To: Dinh Nguyen Cc: Miquel Raynal , Mark Rutland , DTML , =?UTF-8?B?TWFyZWsgVmHFoXV0?= , Richard Weinberger , Linux Kernel Mailing List , Boris Brezillon , Rob Herring , linux-mtd , Brian Norris , David Woodhouse Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Dinh, 2018-06-27 23:55 GMT+09:00 Dinh Nguyen : > Hi Masahiro, > > On 06/26/2018 09:52 PM, Masahiro Yamada wrote: >> 2018-06-27 3:09 GMT+09:00 Miquel Raynal : >>> Hi Masahiro, >>> >>> On Tue, 26 Jun 2018 11:38:21 +0900, Masahiro Yamada >>> wrote: >>> >>>> 2018-06-25 23:55 GMT+09:00 Boris Brezillon : >>>>> On Mon, 25 Jun 2018 09:50:18 -0500 >>>>> Dinh Nguyen wrote: >>>>> >>>>>> On 06/22/2018 10:58 AM, Richard Weinberger wrote: >>>>>>> Masahiro, >>>>>>> >>>>>>> Am Freitag, 22. Juni 2018, 16:37:21 CEST schrieb Masahiro Yamada: >>>>>>>> Hi Richard, >>>>>>>> >>>>>>>> >>>>>>>> 2018-06-19 21:07 GMT+09:00 Richard Weinberger : >>>>>>>>> The denali NAND flash controller needs at least two clocks to operate, >>>>>>>>> nand_clk and nand_x_clk. >>>>>>>>> Since 1bb88666775e ("mtd: nand: denali: handle timing parameters by >>>>>>>>> setup_data_interface()") nand_x_clk is used to derive timing settings. >>>>>>>>> >>>>>>>>> Signed-off-by: Richard Weinberger >>>>>>>>> --- >>>>>>>>> Strictly speaking denali needs a ecc_clk too, but AFAIK such a clock >>>>>>>>> is not present on this SoC. >>>>>>>>> But my SoCFPGA knowledge is very limited. >>>>>>>>> >>>>>>>>> Thanks, >>>>>>>>> //richard >>>>>>>>> --- >>>>>>>>> arch/arm/boot/dts/socfpga.dtsi | 3 ++- >>>>>>>>> 1 file changed, 2 insertions(+), 1 deletion(-) >>>>>>>>> >>>>>>>>> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi >>>>>>>>> index 486d4e7433ed..562f7b375bbd 100644 >>>>>>>>> --- a/arch/arm/boot/dts/socfpga.dtsi >>>>>>>>> +++ b/arch/arm/boot/dts/socfpga.dtsi >>>>>>>>> @@ -754,7 +754,8 @@ >>>>>>>>> reg-names = "nand_data", "denali_reg"; >>>>>>>>> interrupts = <0x0 0x90 0x4>; >>>>>>>>> dma-mask = <0xffffffff>; >>>>>>>>> - clocks = <&nand_clk>; >>>>>>>>> + clocks = <&nand_clk>, <&nand_x_clk>; >>>>>>>>> + clock-names = "nand", "nand_x"; >>>>>>>> >>>>>>>> >>>>>>>> IMHO, this should be >>>>>>>> >>>>>>>> clocks = <&nand_clk>, <&nand_x_clk>, <&nand_x_clk>; >>>>>>>> clock-names = "nand", "nand_x", "ecc"; >>>>>> >>>>>> No, it should be just the nand_x and ecc. >>>>>> >>>>>> There's already a patch to use the nand_x_clk and not the nand_clk. >>>> >>>> >>>> Different people try to fix the problem in different ways. >>>> >>>> I think it is due to miscommunication across sub-systems. >>> >>> Is the series named >>> >>> mtd: rawnand: denali: add new clocks and improve >>> setup_data_interface >>> >>> still valid? >> >> Yes. >> I believe V4 is valid. >> >> >> Information for Dinh Nguyen: >> >> http://patchwork.ozlabs.org/patch/933507/ >> http://patchwork.ozlabs.org/patch/933487/ >> http://patchwork.ozlabs.org/patch/933494/ >> http://patchwork.ozlabs.org/patch/933506/ >> >> >> If he is not convinced, I am open to discussion, though. > > I wasn't aware of these patches. This patch is staged to go into > v4.17-rc3 through the arm-soc: > > https://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git/commit/arch/arm/boot/dts/socfpga.dtsi?h=fixes&id=4eda9b766b042ea38d84df91581b03f6145a2ab0 > > I think your patch will handle a case where only 1 clock is passed in, > so it should be okay right? > I should be OK, but please consider the proper fix for v4.19 as Boris suggested. -- Best Regards Masahiro Yamada