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[209.132.180.67]) by mx.google.com with ESMTP id y6-v6si13258344pgy.224.2018.07.01.21.44.14; Sun, 01 Jul 2018 21:44:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933206AbeGBDt6 (ORCPT + 99 others); Sun, 1 Jul 2018 23:49:58 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:20715 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S932778AbeGBDtz (ORCPT ); Sun, 1 Jul 2018 23:49:55 -0400 X-UUID: 264999b505214593b762f0961a1381d9-20180702 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1815374187; Mon, 02 Jul 2018 11:49:50 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Mon, 2 Jul 2018 11:49:47 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Mon, 2 Jul 2018 11:49:47 +0800 From: To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH v2 0/4] PCI: mediatek: fixup find_port, enable_msi and add pm, module support Date: Mon, 2 Jul 2018 11:49:40 +0800 Message-ID: <1530503384-1218-1-git-send-email-honghui.zhang@mediatek.com> X-Mailer: git-send-email 2.6.4 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Honghui Zhang This patchset includes misc patchs: The first patch fixup the mtk_pcie_find_port logical which will cause system could not touch the EP's configuration space which was connected to PCIe slot 1. The second patch fixup the enable msi logical, the operation to enable msi should be after system clock is enabled. The function of mtk_pcie_startup_port_v2's define location is re-arranged to avoid mtk_pcie_enable_msi's forward declaration. And call mtk_pcie_enable_msi in mtk_pcie_startup_port_v2 since the clock was all enabled at that time. The third patch was rebased and refactor of the v4 patch[1], changes are: -Add PM support for MT7622. -Using mtk_pcie_enable_port to re-establish the link when resumed. -Rebase on the previous two patches. The fourth patch add loadable kernel module support. Some of those patches was already reviewed-by Ryder Lee , so I just add the Reviewed-by tags in those patches. [1] https://patchwork.kernel.org/patch/10479079 Change since v1: - A bit of code refact of the first patch suggested by Andy Shevchenko, and commit message updated. - Using __maybe_unused. - Remove the redundant list_empty check of the fourth patch. Honghui Zhang (4): PCI: mediatek: fixup mtk_pcie_find_port logical PCI: mediatek: enable msi after clock enabled PCI: mediatek: Add system pm support for MT2712 and MT7622 PCI: mediatek: Add loadable kernel module support drivers/pci/controller/Kconfig | 2 +- drivers/pci/controller/pcie-mediatek.c | 289 ++++++++++++++++++++++++--------- 2 files changed, 213 insertions(+), 78 deletions(-) -- 2.6.4