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[209.132.180.67]) by mx.google.com with ESMTP id h91-v6si15617407pld.132.2018.07.02.04.09.08; Mon, 02 Jul 2018 04:09:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754475AbeGBJMg (ORCPT + 99 others); Mon, 2 Jul 2018 05:12:36 -0400 Received: from mga05.intel.com ([192.55.52.43]:19055 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752068AbeGBJMb (ORCPT ); Mon, 2 Jul 2018 05:12:31 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Jul 2018 02:12:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,298,1526367600"; d="scan'208";a="68936139" Received: from shawn-bm6650-bm6350.itwn.intel.com ([10.5.253.27]) by fmsmga001.fm.intel.com with ESMTP; 02 Jul 2018 02:12:28 -0700 From: alanx.chiang@intel.com To: linux-i2c@vger.kernel.org Cc: andy.yeh@intel.com, sakari.ailus@linux.intel.com, andriy.shevchenko@linux.intel.com, andriy.shevchenko@intel.com, rajmohan.mani@intel.com, andy.shevchenko@gmail.com, tfiga@chromium.org, jcliang@chromium.org, brgl@bgdev.pl, robh+dt@kernel.org, mark.rutland@arm.com, arnd@arndb.de, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Alan Chiang Subject: [RESEND PATCH v4 1/2] dt-bindings: at24: Add address-width property Date: Mon, 2 Jul 2018 17:12:19 +0800 Message-Id: <1530522740-2798-2-git-send-email-alanx.chiang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1530522740-2798-1-git-send-email-alanx.chiang@intel.com> References: <1530522740-2798-1-git-send-email-alanx.chiang@intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alan Chiang The AT24 series chips use 8-bit address by default. If some chips would like to support more than 8 bits, the at24 driver should be added the compatible field for specfic chips. Provide a flexible way to determine the addressing bits through address-width in this patch. Signed-off-by: Alan Chiang Signed-off-by: Andy Yeh Acked-by: Sakari Ailus --- since v1: -- Remove the address-width field in the example. since v2: -- Remove redundant space. since v3: -- Add Acked-by. --- Documentation/devicetree/bindings/eeprom/at24.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt index 61d833a..aededdb 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.txt +++ b/Documentation/devicetree/bindings/eeprom/at24.txt @@ -72,6 +72,8 @@ Optional properties: - wp-gpios: GPIO to which the write-protect pin of the chip is connected. + - address-width: number of address bits (one of 8, 16). + Example: eeprom@52 { -- 2.7.4