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Peter Anvin" , Andi Kleen , Ben Maurer , rostedt , Josh Triplett , Catalin Marinas , Will Deacon , Michael Kerrisk , Joel Fernandes Subject: Re: [RFC PATCH for 4.18] rseq: use __u64 for rseq_cs fields, validate user inputs In-Reply-To: <1020760632.10855.1530577391822.JavaMail.zimbra@efficios.com> Message-ID: <010001645d90c295-71d0a2e6-d5ce-4b8a-a60d-5d66fe17c8b3-000000@email.amazonses.com> References: <20180702223143.4663-1-mathieu.desnoyers@efficios.com> <415287289.10831.1530572418907.JavaMail.zimbra@efficios.com> <825871008.10839.1530573419561.JavaMail.zimbra@efficios.com> <010001645d81f652-8a506dd2-cd49-47f9-950a-24ef52bda9f7-000000@email.amazonses.com> <1020760632.10855.1530577391822.JavaMail.zimbra@efficios.com> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-SES-Outgoing: 2018.07.03-54.240.9.99 Feedback-ID: 1.us-east-1.fQZZZ0Xtj2+TD7V5apTT/NrT6QKuPgzCT/IC7XYgDKI=:AmazonSES Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2 Jul 2018, Mathieu Desnoyers wrote: > > > > Platforms with 32 bit word size only guarantee atomicity of a 32 bit > > write or RMV instruction. > > > > Special instructions may exist on a platform to perform 64 bit atomic > > updates. We use cmpxchg64 f.e. on Intel 32 bit platforms to guarantee > > atomicity8. > > > > So use the macros that we have to guarantee 64 bit ops and you should be > > fine. See linux/arch/x86/include/asm/atomic64_32.h > > We are talking about user-space here. What we need is a single instruction > atomic store, similar to what WRITE_ONCE() does in the kernel. The discussion > is about whether doing the user-space equivalent of a WRITE_ONCE() to a u64 > on a 32-bit architecture should be considered to provide single-copy atomicity > on the low 32 bits. Right. You would need to make this work for userspace. atomic64_32.h is a good reference as to which instructions provide 64 bit atomicity on 32 bit platforms.