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[209.132.180.67]) by mx.google.com with ESMTP id o189-v6si3639325pga.577.2018.07.04.10.01.23; Wed, 04 Jul 2018 10:01:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Im7yXsEL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752976AbeGDRAq (ORCPT + 99 others); Wed, 4 Jul 2018 13:00:46 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:39084 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752173AbeGDRAo (ORCPT ); Wed, 4 Jul 2018 13:00:44 -0400 Received: by mail-pl0-f66.google.com with SMTP id s24-v6so41881plq.6; Wed, 04 Jul 2018 10:00:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=WmCNuQnfXIq3s1NgAiKKWmRRFnYRKumbuMn4+jV6W78=; b=Im7yXsELQES1mJg10768WCMLCLt3SALHdb5RZXFE/C08XTsIu7vHrGlzy080HaobSw 6QnrNJXJH0pxfltqH2j+ezT7dtxk7dMV0vw+3ENb2U7GZl/HZQDJdkdvzQG6GzmCouEn GtvJC/0rRegzi4vd+4WnbDCRzXmVVhWIAV292iuSbU0+I1nIAHD3gVUJGLEW3RTmbHF2 RGLrrist+G/q9OYltJQXgVF8hWrZ6khf3HFk6eTy+Z7nmWLIaTlgTVwjo6sKt2yUuLOD Rsd4sEPmGVBsevtwKipz1dQGuPvWDEzs4d9NKOfsFt9ISe35yffv5Ou+FfpZXujTi4la /0Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=WmCNuQnfXIq3s1NgAiKKWmRRFnYRKumbuMn4+jV6W78=; b=hb33+6YRFJKJFJOR8gExApivgA+2WqHn4od9kZGRRVTBvuf5iflNTW7OIh2W5hqnhP HC8sxwxu3/k95J1CLdX50gV8TyyiC6/gWCAvllddQjobWjMOo/mDdX3Bh67NSvojgWK5 whGCGJtYWwGrtug+6RmTa/GOoJQDtv8c5lrX5+Z/GWfmeorun93LnL3a9j7N1I7mglSK nI/+H9eGmwSPLI2IIAIjywuyrrsui66ah3f/ndFRvsUascOLR2iWaaXD1xSNSzKeq62Y 8IpuZjMcjj2TSVfV4sDvvc6JEhSrHoW7NgsbK/dF1So5tMHJY5Dn4f8DXW+HiiseZQ+B 4JfQ== X-Gm-Message-State: APt69E2b10GVj6mhhVipDIw0wGld+WgW22X9gpKS47MZLTCOjyReZRrA /M8UbWD3rbevLIkjpGtH6wsLYiDgK1ra7IqDdOg= X-Received: by 2002:a17:902:9a4b:: with SMTP id x11-v6mr2815890plv.342.1530723644342; Wed, 04 Jul 2018 10:00:44 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a17:90a:2604:0:0:0:0 with HTTP; Wed, 4 Jul 2018 10:00:43 -0700 (PDT) In-Reply-To: <20180703123214.23090-8-paul@crapouillou.net> References: <20180703123214.23090-1-paul@crapouillou.net> <20180703123214.23090-8-paul@crapouillou.net> From: PrasannaKumar Muralidharan Date: Wed, 4 Jul 2018 22:30:43 +0530 Message-ID: Subject: Re: [PATCH 07/14] dmaengine: dma-jz4780: Enable Fast DMA to the AIC To: Paul Cercueil Cc: Vinod Koul , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , James Hogan , Zubair Lutfullah Kakakhel , Mathieu Malaterre , Daniel Silsby , dmaengine@vger.kernel.org, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list , Linux-MIPS Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3 July 2018 at 18:02, Paul Cercueil wrote: > With the fast DMA bit set, the DMA will transfer twice as much data > per clock period to the AIC, so there is little point not to set it. > > Signed-off-by: Paul Cercueil > --- > drivers/dma/dma-jz4780.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c > index 922e4031e70e..7ee2c121948f 100644 > --- a/drivers/dma/dma-jz4780.c > +++ b/drivers/dma/dma-jz4780.c > @@ -52,6 +52,7 @@ > #define JZ_DMA_DMAC_DMAE BIT(0) > #define JZ_DMA_DMAC_AR BIT(2) > #define JZ_DMA_DMAC_HLT BIT(3) > +#define JZ_DMA_DMAC_FAIC BIT(27) > #define JZ_DMA_DMAC_FMSC BIT(31) > > #define JZ_DMA_DRT_AUTO 0x8 > @@ -929,8 +930,8 @@ static int jz4780_dma_probe(struct platform_device *pdev) > * Also set the FMSC bit - it increases MSC performance, so it makes > * little sense not to enable it. > */ > - jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DMAC, > - JZ_DMA_DMAC_DMAE | JZ_DMA_DMAC_FMSC); > + jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DMAC, JZ_DMA_DMAC_DMAE | > + JZ_DMA_DMAC_FAIC | JZ_DMA_DMAC_FMSC); > > if (jzdma->version == ID_JZ4780) > jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DMACP, 0); > -- > 2.18.0 > > Reviewed-by: PrasannaKumar Muralidharan .