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[209.132.180.67]) by mx.google.com with ESMTP id 97-v6si3931336pld.345.2018.07.04.10.37.04; Wed, 04 Jul 2018 10:37:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753211AbeGDRfv (ORCPT + 99 others); Wed, 4 Jul 2018 13:35:51 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:41194 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752970AbeGDRf1 (ORCPT ); Wed, 4 Jul 2018 13:35:27 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B1BC37A9; Wed, 4 Jul 2018 10:35:26 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 821D93F5A0; Wed, 4 Jul 2018 10:35:26 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 800891AE180C; Wed, 4 Jul 2018 18:36:06 +0100 (BST) Date: Wed, 4 Jul 2018 18:36:06 +0100 From: Will Deacon To: Thomas Gleixner Cc: "Kani, Toshi" , "akpm@linux-foundation.org" , "linux-kernel@vger.kernel.org" , "linux-mm@kvack.org" , "stable@vger.kernel.org" , "joro@8bytes.org" , "x86@kernel.org" , "hpa@zytor.com" , "mingo@redhat.com" , "Hocko, Michal" , "cpandya@codeaurora.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH v4 2/3] ioremap: Update pgtable free interfaces with addr Message-ID: <20180704173605.GB9668@arm.com> References: <20180627141348.21777-1-toshi.kani@hpe.com> <20180627141348.21777-3-toshi.kani@hpe.com> <20180627155632.GH30631@arm.com> <1530115885.14039.295.camel@hpe.com> <20180629122358.GC17859@arm.com> <1530287995.14039.361.camel@hpe.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 03, 2018 at 11:02:15PM +0200, Thomas Gleixner wrote: > On Fri, 29 Jun 2018, Kani, Toshi wrote: > > On Fri, 2018-06-29 at 13:23 +0100, Will Deacon wrote: > > > On Wed, Jun 27, 2018 at 04:13:22PM +0000, Kani, Toshi wrote: > > > > On Wed, 2018-06-27 at 16:56 +0100, Will Deacon wrote: > > > > > On Wed, Jun 27, 2018 at 08:13:47AM -0600, Toshi Kani wrote: > > > > > > From: Chintan Pandya > > > > > > > > > > > > The following kernel panic was observed on ARM64 platform due to a stale > > > > > > TLB entry. > > > > > > > > > > > > 1. ioremap with 4K size, a valid pte page table is set. > > > > > > 2. iounmap it, its pte entry is set to 0. > > > > > > 3. ioremap the same address with 2M size, update its pmd entry with > > > > > > a new value. > > > > > > 4. CPU may hit an exception because the old pmd entry is still in TLB, > > > > > > which leads to a kernel panic. > > > > > > > > > > > > Commit b6bdb7517c3d ("mm/vmalloc: add interfaces to free unmapped page > > > > > > table") has addressed this panic by falling to pte mappings in the above > > > > > > case on ARM64. > > > > > > > > > > > > To support pmd mappings in all cases, TLB purge needs to be performed > > > > > > in this case on ARM64. > > > > > > > > > > > > Add a new arg, 'addr', to pud_free_pmd_page() and pmd_free_pte_page() > > > > > > so that TLB purge can be added later in seprate patches. > > > > > > > > > > So I acked v13 of Chintan's series posted here: > > > > > > > > > > http://lists.infradead.org/pipermail/linux-arm-kernel/2018-June/582953.html > > > > > > > > > > any chance this lot could all be merged together, please? > > > > > > > > Chintan's patch 2/3 and 3/3 apply cleanly on top of my series. Can you > > > > please coordinate with Thomas on the logistics? > > > > > > Sure. I guess having this series on a common branch that I can pull into > > > arm64 and apply Chintan's other patches on top would work. > > > > > > How does that sound? > > > > Should this go thru -mm tree then? > > > > Andrew, Thomas, what do you think? > > I just pick it up and provide Will a branch to pull that lot from. Thanks, Thomas. Please let me know once you've pushed something out. Will