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[24.223.123.72]) by smtp.gmail.com with ESMTPSA id g65-v6sm2587256oia.23.2018.07.05.16.23.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 05 Jul 2018 16:23:41 -0700 (PDT) Date: Thu, 5 Jul 2018 17:23:40 -0600 From: Rob Herring To: Mars Cheng Cc: Matthias Brugger , Marc Zyngier , Greg Kroah-Hartman , CC Hwang , Loda Chou , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, wsd_upstream@mediatek.com, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 3/4] dt-bindings: interrupt-controller: add binding for mt6765 Message-ID: <20180705232340.GA14969@rob-hp-laptop> References: <1530669174-17623-1-git-send-email-mars.cheng@mediatek.com> <1530669174-17623-4-git-send-email-mars.cheng@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1530669174-17623-4-git-send-email-mars.cheng@mediatek.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 04, 2018 at 09:52:53AM +0800, Mars Cheng wrote: > Update the dt-binding documentation of sysirq for mt6765 > > Signed-off-by: Mars Cheng > --- > .../interrupt-controller/mediatek,sysirq.txt | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Rob Herring