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[209.132.180.67]) by mx.google.com with ESMTP id q13-v6si7186407pll.72.2018.07.05.20.57.16; Thu, 05 Jul 2018 20:57:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FKSjxOyN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932323AbeGFD4H (ORCPT + 99 others); Thu, 5 Jul 2018 23:56:07 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:46487 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932261AbeGFD4D (ORCPT ); Thu, 5 Jul 2018 23:56:03 -0400 Received: by mail-pf0-f195.google.com with SMTP id l123-v6so7208869pfl.13 for ; Thu, 05 Jul 2018 20:56:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=t33j/YWl9147C3o56cc/SXhWTJq/mWttqXWsSRue59w=; b=FKSjxOyNyLIFqLRBdLbPexUrj0l53lmf2+WYmqJkoaH8FoZ4gOmGG1nPNuloakxI3H 3KBYdenCi3prowOjbwKen0iX+OG1lMiUg3mRMDqY/I5/Lb7R4z5OQAXK/Kxvw1Gx2A77 hdM12KOYrciQzRugydXXC4t9CSt0uWHeeV4OE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=t33j/YWl9147C3o56cc/SXhWTJq/mWttqXWsSRue59w=; b=nin+c8+jr343evlU6D83Va0EwxZzCRUoRKDBGTxinOpaNs5xDSZcAsj22VAr4gO3Px tyJ/lhczTPLIRFRGdaC/m+maYZ7uuDWRwsSt+8WYeHP4Y/rNN6uCpNNVvKnFXL+O5N8w Se9qGi5fjkuwKPIo2kMYNev5mSNjN4dGmzEFN1rPANXml0Em5GoEmNLWWoEMMtS0hpcj 1wgWbF36/111P4BxwbYtlK/b2Fb1otDs0hmZIilPh9oOGRjCrSpYWdrfSn/yw90dH/n3 HxQ5vVzmmQBgb+4+8rHNf4BWQJotdxmAAxUbo2f0+jnqFIeG85uQUW1e9HeqR0m1bLkW hSzQ== X-Gm-Message-State: APt69E3MzHAJCyUrHJ7Y1a4OYJtfDxjZVLm3GaAPXjfhG+kLRKeB64/+ a60rm/S1k4XXXjSBYI9CHTfPiw== X-Received: by 2002:a65:5288:: with SMTP id y8-v6mr1176118pgp.284.1530849362942; Thu, 05 Jul 2018 20:56:02 -0700 (PDT) Received: from localhost.localdomain ([64.64.108.33]) by smtp.gmail.com with ESMTPSA id y14-v6sm12568403pgo.22.2018.07.05.20.55.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 Jul 2018 20:56:02 -0700 (PDT) From: Guodong Xu To: vkoul@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, dan.j.williams@intel.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com Cc: liyu65@hisilicon.com, suzhuangluan@hisilicon.com, xuhongtao8@hisilicon.com, zhongkaihua@huawei.com, xuezhiliang@hisilicon.com, xupeng7@huawei.com, sunliang10@huawei.com, fengbaopeng@hisilicon.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Guodong Xu Subject: [PATCH v2 1/4] dt-bindings: k3dma: add optional property hisilicon,dma-min-chan Date: Fri, 6 Jul 2018 11:55:18 +0800 Message-Id: <20180706035521.13736-2-guodong.xu@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180706035521.13736-1-guodong.xu@linaro.org> References: <20180706035521.13736-1-guodong.xu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Li Yu Add optional property hisilicon,dma-min-chan for k3dma. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/k3dma.txt b/Documentation/devicetree/bindings/dma/k3dma.txt index 4945aeac4dc4..f34202a80f3c 100644 --- a/Documentation/devicetree/bindings/dma/k3dma.txt +++ b/Documentation/devicetree/bindings/dma/k3dma.txt @@ -12,6 +12,11 @@ Required properties: have specific request line - clocks: clock required +Optional properties: +- hisilicon,dma-min-chan: the minimum DMA channel number which is usable + Default value is 0, but in some platform it is + configured 1, like in hi3660 platform + Example: Controller: @@ -21,6 +26,7 @@ Controller: #dma-cells = <1>; dma-channels = <16>; dma-requests = <27>; + hisilicon,dma-min-chan = <1>; interrupts = <0 12 4>; clocks = <&pclk>; }; -- 2.17.1