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[209.132.180.67]) by mx.google.com with ESMTP id n2-v6si9913470pgq.675.2018.07.07.12.44.25; Sat, 07 Jul 2018 12:44:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754300AbeGGTnX (ORCPT + 99 others); Sat, 7 Jul 2018 15:43:23 -0400 Received: from smtp13.smtpout.orange.fr ([80.12.242.135]:25355 "EHLO smtp.smtpout.orange.fr" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754150AbeGGTnV (ORCPT ); Sat, 7 Jul 2018 15:43:21 -0400 Received: from belgarion.home ([90.55.203.186]) by mwinf5d73 with ME id 7viq1y00641oiFu03viyms; Sat, 07 Jul 2018 21:43:19 +0200 X-ME-Helo: belgarion.home X-ME-Auth: amFyem1pay5yb2JlcnRAb3JhbmdlLmZy X-ME-Date: Sat, 07 Jul 2018 21:43:19 +0200 X-ME-IP: 90.55.203.186 From: Robert Jarzmik To: Rob Herring , Mark Rutland , Daniel Mack , Haojian Zhuang , Robert Jarzmik , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/2] ARM: dts: pxa: add pincontrol helpers Date: Sat, 7 Jul 2018 21:42:46 +0200 Message-Id: <20180707194247.31143-1-robert.jarzmik@free.fr> X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add 3 helpers so that pincontrol definitions for pxa25x and pxa27x are easier, and can be easily converted from old mfp mach-pxa code to devicetree. An example of such conversion would be : static unsigned long mioa701_pin_config[] = { GPIO32_MMC_CLK, GPIO92_MMC_DAT_0, GPIO109_MMC_DAT_1, GPIO110_MMC_DAT_2, GPIO111_MMC_DAT_3, GPIO112_MMC_CMD, MIO_CFG_IN(GPIO78_SDIO_RO, AF0), MIO_CFG_IN(GPIO15_SDIO_INSERT, AF0), MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW), }; into: pinctrl_mmc_default: mmc-default { PMMUX(sd-insert, 15, gpio_in); PMMUX(mmclk, 32, MMCLK); PMMUX(sd-ro, 78, gpio_in); PMMUX_LPM_LOW(sd-enable, 91, gpio_out); PMMUX(mmdat0, 92, MMDAT<0>); PMMUX(mmdat1, 109, MMDAT<1>); PMMUX(mmdat2, 110, MMDAT<2>); PMMUX(mmdat3, 111, MMDAT<3>); PMMUX(mmcmd, 112, MMCMD); }; The third column of PMMUX*() helpers can be found in pincontrol muxing functions, either in pinctrl-pxa27x.c (or pinctrl-pxa25x.c), or by inspecting the pincontrol once booted in debugfs. Signed-off-by: Robert Jarzmik --- arch/arm/boot/dts/pxa2xx.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi index e4ebcde17837..f609dbb86abf 100644 --- a/arch/arm/boot/dts/pxa2xx.dtsi +++ b/arch/arm/boot/dts/pxa2xx.dtsi @@ -9,6 +9,25 @@ #include "skeleton.dtsi" #include "dt-bindings/clock/pxa-clock.h" +#define PMGROUP(pin) #pin +#define PMMUX(func, pin, af) \ + mux- ## func { \ + groups = PMGROUP(P ## pin); \ + function = #af; \ + } +#define PMMUX_LPM_LOW(func, pin, af) \ + mux- ## func { \ + groups = PMGROUP(P ## pin); \ + function = #af; \ + low-power-disable; \ + } +#define PMMUX_LPM_HIGH(func, pin, af) \ + mux- ## func { \ + groups = PMGROUP(P ## pin); \ + function = #af; \ + low-power-enable; \ + } + / { model = "Marvell PXA2xx family SoC"; compatible = "marvell,pxa2xx"; -- 2.11.0