Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp165844imm; Sun, 8 Jul 2018 22:35:56 -0700 (PDT) X-Google-Smtp-Source: AAOMgpefHXq5eT5326vRHNmUE/P23+j80H/vr3+DutEk3AHRIZoFFWhdWYGAKHjlQf6l087+YSDD X-Received: by 2002:a62:1358:: with SMTP id b85-v6mr20018372pfj.238.1531114556741; Sun, 08 Jul 2018 22:35:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531114556; cv=none; d=google.com; s=arc-20160816; b=tCJ4BbGS9nuJ/Ca2OJ5o0BwwJJHoQS01Z4v0S4MI3Ynas4e5a1Jal5pcd04qcYx0M0 Y8axGWyoGsD6HNaKaeU0K0GzNAXwix0OWFFSbG5t2sT0B4rsBrdDEuzxH3UnrEA6Xw7R KnrhDZYpf9wp4DdXqIWxiJI0yT3mZe+IqW04wQ73w5/F9aR4BG0Jkc7vi4f2QsVN4g+P ag56L+SGLr1MjC7CEToQA+SNzQHEI47QiCIZdwIMmxt55JGq0V5V5XOQZK6dVOUp3Tj9 EQ7fr/cF69Gv0MlQ7ZFq5QJ3Y7GZ3eBlRYLDdYjL5awnDMVNEOt6u4vCnaU72EUo9t24 PO9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:subject:user-agent:message-id :references:cc:in-reply-to:from:to:content-transfer-encoding :mime-version:dkim-signature:arc-authentication-results; bh=+l3giNwWYksSP+Sw5UJh8HADNVx2fjHD5/RCR3OxaVg=; b=Lt/1umKldIJK3u9YnrNYisJIDS8AWlBkKCkNv2mEzKoDH7gTMNVEkqdrJT0Sh3AIpC z/B8LRaT3j/T2kMKmOArxWb9v8x2udZRLmzTf8DdXxBJe4+09ABKz05ykNGo4YafuqkC +m7EaOdR8y1MWAo8wR7nlJHUJV9gK56Tx7997DXhgFuf6t5uQIHGHc2cl2TpK+lAm/3j s+2k3/BVgW14DGUSE1tv12Frp4hxs7asfOXKwdD1daKPBwp8c1CkgCl6KGOdGnAQIhOy x50b/7RkzaXq71+MfniLPTFijCzLvczWg9jAOTo/zHeZT/6nZGQezMcWHK7x7zJVXcBU q9rg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=QIvxyGcH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t67-v6si14841162pfd.364.2018.07.08.22.35.42; Sun, 08 Jul 2018 22:35:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=QIvxyGcH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754733AbeGIFen (ORCPT + 99 others); Mon, 9 Jul 2018 01:34:43 -0400 Received: from mail.kernel.org ([198.145.29.99]:34898 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754713AbeGIFeg (ORCPT ); Mon, 9 Jul 2018 01:34:36 -0400 Received: from localhost (unknown [104.132.1.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E7BFB208DB; Mon, 9 Jul 2018 05:34:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1531114476; bh=xtublNqMN+HxLY6eO56FPltOB0NEWfJL4bOiLZr8Pjc=; h=To:From:In-Reply-To:Cc:References:Subject:Date:From; b=QIvxyGcH2pR6d72K4Bg8ZbnBe1A2aWx7WX8eHICWqqYFjSJ70aod2bhLQcGZyMp3n IWLopwSE/dOOnjLufPiW+ulbTKVUQvQNdc8tU5OG0MLCT/xnnG7dXl4ZF1Ab55P0eU q1XZhy2OtGSjn1T3+2atLzJkygZhkqIgSfdWfM68= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: Amit Nischal , Michael Turquette From: Stephen Boyd In-Reply-To: <1528285308-25477-2-git-send-email-anischal@codeaurora.org> Cc: Andy Gross , David Brown , Rajendra Nayak , Odelu Kukatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Amit Nischal References: <1528285308-25477-1-git-send-email-anischal@codeaurora.org> <1528285308-25477-2-git-send-email-anischal@codeaurora.org> Message-ID: <153111447519.143105.17241493270191899078@swboyd.mtv.corp.google.com> User-Agent: alot/0.7 Subject: Re: [PATCH 1/4] clk: qcom: gdsc: Add support to enable/disable the clocks with GDSC Date: Sun, 08 Jul 2018 22:34:35 -0700 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Amit Nischal (2018-06-06 04:41:45) > For some of the GDSCs, there is a requirement to enable/disable the > few clocks before turning on/off the gdsc power domain. Add support Why is there a requirement? Do the clks need to be in hw control mode or they can't be turned off when the GDSC is off? It's hard for me to understand with these vague statements. > for the same by specifying a list of clk_hw pointers per gdsc and > enable/disable them along with power domain on/off callbacks. > = > Signed-off-by: Amit Nischal > --- > drivers/clk/qcom/gdsc.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ > drivers/clk/qcom/gdsc.h | 5 +++++ > 2 files changed, 49 insertions(+) > = > diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c > index a077133..b6adca1 100644 > --- a/drivers/clk/qcom/gdsc.c > +++ b/drivers/clk/qcom/gdsc.c > @@ -12,6 +12,8 @@ > */ > = > #include > +#include Ugh. > +#include Both, really? > #include > #include > #include > @@ -208,11 +210,41 @@ static inline void gdsc_assert_reset_aon(struct gds= c *sc) > regmap_update_bits(sc->regmap, sc->clamp_io_ctrl, > GMEM_RESET_MASK, 0); > } > + > +static int gdsc_clk_prepare_enable(struct gdsc *sc) > +{ > + int i, ret; > + > + for (i =3D 0; i < sc->clk_count; i++) { > + ret =3D clk_prepare_enable(sc->clk_hws[i]->clk); > + if (ret) { > + for (i--; i >=3D 0; i--) > + clk_disable_unprepare(sc->clk_hws[i]->clk= ); > + return ret; > + } > + } > + return 0; > +} > + Looks an awful lot like bulk_enable clk API.