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[209.132.180.67]) by mx.google.com with ESMTP id t8-v6si14974580pfi.221.2018.07.09.04.34.07; Mon, 09 Jul 2018 04:34:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eodbefVf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932770AbeGILb7 (ORCPT + 99 others); Mon, 9 Jul 2018 07:31:59 -0400 Received: from mail-it0-f67.google.com ([209.85.214.67]:36498 "EHLO mail-it0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932482AbeGILb4 (ORCPT ); Mon, 9 Jul 2018 07:31:56 -0400 Received: by mail-it0-f67.google.com with SMTP id j185-v6so25611704ite.1 for ; Mon, 09 Jul 2018 04:31:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=G6c9a47YExbDBhVY3P4bZgpa8L9U1okymtiLcOu2tV0=; b=eodbefVfnBWoLEQVQmHVpWCo2TWNvawrWQA8s2l5F3b6TukJ/B/96mdeDHRc0a7mLK R+UgGlw9hLbPbYhHrLpzstwD4Soqb0LS8IBQ1vK8FnrRrkisX+Jx80G5bWthgfIz6PST a1rEc9MPmYGYhOHj+3ND4hjUaQlRgoLC1b6/Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=G6c9a47YExbDBhVY3P4bZgpa8L9U1okymtiLcOu2tV0=; b=TtcDid437Mu9F4c2J2GkhanhE+WUr0EQ2qu5f0LgxZGhFPXMpRyTDELM//T1d6WPOq Xg3CKGRI5xspH/YFeW7EnlQyuBErMP0jnNuwq+AQ9i6cGoqJjc/rba+rxTEa6OQJE+j+ NxOSS8jb6AXk21Kmgk5e+7XGtQEUutY+AbwfPCq+PDMq1OsrTvVde5aSYBR4nSpuW5Bj WrTwlZPwcUJ8MZCgsiYFyrBJk7AIbi7LhCU3J+ur1CiDHG8B5y26dq7/zTq/bXavckvY km80ZcfV9YCDJPEBTdRV3y9Q/rR0blwSLRqq7v4Iw392J26IZhffQC8Hw8KSQ+AlG0SQ Vulw== X-Gm-Message-State: APt69E33IeCakf/+WwcOIEDQCok7duMy8pavxlWw5N+goFpH2cefNN84 mSbw2QGWoBp454om2tShwEN2kQCWCJ3WeEEX9Mc6cw== X-Received: by 2002:a24:d00b:: with SMTP id m11-v6mr16051257itg.97.1531135916322; Mon, 09 Jul 2018 04:31:56 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a02:818f:0:0:0:0:0 with HTTP; Mon, 9 Jul 2018 04:31:55 -0700 (PDT) In-Reply-To: <3d4064a559e741e05105b11c9e7a831d@agner.ch> References: <20180704150745.21003-1-stefan@agner.ch> <3d4064a559e741e05105b11c9e7a831d@agner.ch> From: Ulf Hansson Date: Mon, 9 Jul 2018 13:31:55 +0200 Message-ID: Subject: Re: [PATCH v2] mmc: sdhci-esdhc-imx: allow 1.8V modes without 100/200MHz pinctrl states To: Stefan Agner Cc: Adrian Hunter , Fabio Estevam , Haibo Chen , Aisheng Dong , Michael Trimarchi , Russell King , "linux-mmc@vger.kernel.org" , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5 July 2018 at 16:22, Stefan Agner wrote: > On 05.07.2018 15:10, Ulf Hansson wrote: >> On 4 July 2018 at 17:07, Stefan Agner wrote: >>> If pinctrl nodes for 100/200MHz are missing, the controller should >>> not select any mode which need signal frequencies 100MHz or higher. >>> To prevent such speed modes the driver currently uses the quirk flag >>> SDHCI_QUIRK2_NO_1_8_V. This works nicely for SD cards since 1.8V >>> signaling is required for all faster modes and slower modes use 3.3V >>> signaling only. >>> >>> However, there are eMMC modes which use 1.8V signaling and run below >>> 100MHz, e.g. DDR52 at 1.8V. With using SDHCI_QUIRK2_NO_1_8_V this >>> mode is prevented. When using a fixed 1.8V regulator as vqmmc-supply >>> the stack has no valid mode to use. In this tenuous situation the >>> kernel continuously prints voltage switching errors: >>> mmc1: Switching to 3.3V signalling voltage failed >>> >>> Avoid using SDHCI_QUIRK2_NO_1_8_V and prevent faster modes by >>> altering the SDHCI capability register. With that the stack is able >>> to select 1.8V modes even if no faster pinctrl states are available: >>> # cat /sys/kernel/debug/mmc1/ios >>> ... >>> timing spec: 8 (mmc DDR52) >>> signal voltage: 1 (1.80 V) >>> ... >>> >>> Link: http://lkml.kernel.org/r/20180628081331.13051-1-stefan@agner.ch >>> Signed-off-by: Stefan Agner >> >> Thanks, applied for next! Let's see if this turns out okay, then let's >> make it a fix and add a stable tag. >> >> BTW, would you mind looking up the commit it fixes? Or if there is a >> certain stable release we should target. >> > > The quirk SDHCI_QUIRK2_NO_1_8_V has been used if pinctrl were missing > since support has been added for additional pinctrl states (back around > 3.13). > > Fixes: ad93220de7da ("mmc: sdhci-esdhc-imx: change pinctrl state > according to uhs mode") > > I guess it won't apply on older kernels since the code which applies the > quirk has been moved around. Thanks! I have moved the patch to fixes and added a stable tag, # v4.13+. It applied cleanly on top of that kernel version, if you or anyone else needs it for an older kernel, please post a backported patch. [...] Kind regards Uffe