Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp735788imm;
        Mon, 9 Jul 2018 09:40:51 -0700 (PDT)
X-Google-Smtp-Source: AAOMgpcHp8HVW3koAosLCxlewvzn5BY6/xjcRk7uEipcKFBE+RxX2k/hTRZ5SZhR348tVmHuRAMl
X-Received: by 2002:a17:902:740b:: with SMTP id g11-v6mr15571341pll.85.1531154451234;
        Mon, 09 Jul 2018 09:40:51 -0700 (PDT)
ARC-Seal: i=1; a=rsa-sha256; t=1531154451; cv=none;
        d=google.com; s=arc-20160816;
        b=t/1wKfQzCAZi4ThTI3oFhIBn0mgN2NMxij6k7jjw3ztPAbBAzp5Rtq+g5wsU57RtoG
         Mmvzyge6CS6KKzy0aHMz+/kch8j4EOKaxB0kQy6BETdOec9ltPHhZ7x42VaJh+aLzmJg
         r2ntRAUNmMlAaYpi790sgWeu4Ui23Aq0smmhpzQHMh/xXEchwpZ0n1bancM+mI2FL0Gs
         /vKsn1Th0TQe0eVw4ppa1ffArX2iZJoWQsPEk/aVlRHLXm2mGLcg4j6TYYz6CAyeBNZ7
         kezR1S6UUM3qDRoYTEvcZt0GN1VC4TGilsCyvONv2t7krHmRvslGnI98TDXB5NCrRylo
         ebcQ==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:mime-version:references:in-reply-to
         :message-id:date:subject:cc:to:from:arc-authentication-results;
        bh=tsia8fFs1tvtNDEtzDHq9lrNoZZC6PlFgn3sr+Bob7k=;
        b=mjXG30se76Zdr4h+M9PmVQ5gM5FLayGSKgnV4bJta8X/Z3Z1vXDYWXihjI9tpDnJcR
         4kcXZDhjxEuqcl6ofFPR+Wg7oWqK1bd52UTnsL7RaP2n1lFJwS3GDs1KRUVYXfjDpoUp
         Eu5H+/tjS3byu484ZvmUKP0j16ZrWuxiDjbHRWyaL6jh2D0877wdHmRqBeYjPgEsamEC
         7ysL0oex4PMZIe5l8OfSogSxNFHcPMb81pqPIAusjwzEhUUrSdnIHjmWFXUn4t47X+SY
         UTumd8lsKxq4RB7QFyZajlL9XPMLJyo9vj5Ew4Ypc63WSGA1IAa0L3scOmJ5PRt5cjks
         2yuw==
ARC-Authentication-Results: i=1; mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id 31-v6si14832445plk.49.2018.07.09.09.40.37;
        Mon, 09 Jul 2018 09:40:51 -0700 (PDT)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S933458AbeGIQjO (ORCPT <rfc822;daisukeokaopensource@gmail.com>
        + 99 others); Mon, 9 Jul 2018 12:39:14 -0400
Received: from hqemgate16.nvidia.com ([216.228.121.65]:5312 "EHLO
        hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S932770AbeGIQjJ (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Mon, 9 Jul 2018 12:39:09 -0400
Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1, AES128-SHA)
        id <B5b438fa80000>; Mon, 09 Jul 2018 09:39:04 -0700
Received: from HQMAIL101.nvidia.com ([172.20.161.6])
  by hqpgpgate101.nvidia.com (PGP Universal service);
  Mon, 09 Jul 2018 09:39:09 -0700
X-PGP-Universal: processed;
        by hqpgpgate101.nvidia.com on Mon, 09 Jul 2018 09:39:09 -0700
Received: from dhcp-10-21-25-168.Nvidia.com (10.21.25.201) by
 HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id
 15.0.1347.2; Mon, 9 Jul 2018 16:39:06 +0000
From:   Aapo Vienamo <avienamo@nvidia.com>
To:     Peter De Schrijver <pdeschrijver@nvidia.com>
CC:     Prashant Gaikwad <pgaikwad@nvidia.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Thierry Reding <thierry.reding@gmail.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>,
        <linux-tegra@vger.kernel.org>, Aapo Vienamo <avienamo@nvidia.com>
Subject: [PATCH v4 1/4] clk: tegra: Fix includes required by fence_udelay()
Date:   Mon, 9 Jul 2018 19:38:55 +0300
Message-ID: <1531154338-3998-2-git-send-email-avienamo@nvidia.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1531154338-3998-1-git-send-email-avienamo@nvidia.com>
References: <1531154338-3998-1-git-send-email-avienamo@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
X-Originating-IP: [10.21.25.201]
X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To HQMAIL101.nvidia.com
 (172.20.187.10)
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Add the missing linux/delay.h include statement for udelay() used by
fence_udelay() macro.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
---
 drivers/clk/tegra/clk.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index e1f8846..e3b9c22 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -19,6 +19,7 @@
 
 #include <linux/clk-provider.h>
 #include <linux/clkdev.h>
+#include <linux/delay.h>
 
 /**
  * struct tegra_clk_sync_source - external clock source from codec
-- 
2.7.4