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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 98542807-818c-4000-4271-08d5e5ce408f X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Jul 2018 19:00:34.9835 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR04MB1212 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Thank you, Thierry.=20 Have you also reviewed and accepted the other 3 patches in this serial? Regards, Shenwei -----Original Message----- From: Thierry Reding [mailto:thierry.reding@gmail.com]=20 Sent: Monday, July 9, 2018 12:09 PM To: Shenwei Wang Cc: linux-pwm@vger.kernel.org; dl-linux-imx ; linux-kern= el@vger.kernel.org Subject: Re: [PATCH v2 1/4] pwm: fsl-ftm: Added a dedicated IP interface cl= ock On Fri, Jun 08, 2018 at 02:22:34PM -0500, shenwei.wang@nxp.com wrote: > The current driver assumes that the ftm_sys clock works as one of the=20 > clock sources for the IP block as well as the IP interface clock. This=20 > assumption does not apply any more on the latest i.MX8x SoC family. On=20 > i.MX8x SoCs, a dedicated IP interface clock is introduced and it must=20 > be enabled before accessing any FTM registers. Moreover, the clock can=20 > not be used as the source clock for the FTM IP block. This patch=20 > introduces the ipg_clk as the dedicated IP interface clock and by=20 > default it is the same as the ftm_sys clock if not specified. >=20 > Signed-off-by: Shenwei Wang > --- > drivers/pwm/pwm-fsl-ftm.c | 22 ++++++++++++++++------ > 1 file changed, 16 insertions(+), 6 deletions(-) Applied, thanks. Thierry