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[209.132.180.67]) by mx.google.com with ESMTP id q63-v6si15725017pfb.309.2018.07.09.16.06.08; Mon, 09 Jul 2018 16:06:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933132AbeGIXEO (ORCPT + 99 others); Mon, 9 Jul 2018 19:04:14 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:59558 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S932797AbeGIXEM (ORCPT ); Mon, 9 Jul 2018 19:04:12 -0400 X-UUID: 17554c824a564b24af8df060adbddb2f-20180710 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 913943140; Tue, 10 Jul 2018 07:04:05 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs03n1.mediatek.inc (172.21.101.181) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 10 Jul 2018 07:04:03 +0800 Received: from [172.21.77.33] (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 10 Jul 2018 07:04:03 +0800 Message-ID: <1531177443.7777.18.camel@mtkswgap22> Subject: Re: [PATCH v4 1/1] arm64: dts: mediatek: add mt6765 support From: Mars Cheng To: Marc Zyngier CC: Matthias Brugger , Rob Herring , CC Hwang , Loda Chou , , , , , , Date: Tue, 10 Jul 2018 07:04:03 +0800 In-Reply-To: References: <1531116302-29921-1-git-send-email-mars.cheng@mediatek.com> <1531116302-29921-2-git-send-email-mars.cheng@mediatek.com> <7fb13f45-4e33-6efc-467b-c7256a40cbc9@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Matthias/Marc On Mon, 2018-07-09 at 17:43 +0100, Marc Zyngier wrote: > On 09/07/18 11:20, Matthias Brugger wrote: > > > > > > On 09/07/18 08:05, Mars Cheng wrote: > >> This adds basic chip support for MT6765 SoC. > >> > >> Signed-off-by: Mars Cheng > >> --- > >> arch/arm64/boot/dts/mediatek/Makefile | 1 + > >> arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 ++++++ > >> arch/arm64/boot/dts/mediatek/mt6765.dtsi | 156 +++++++++++++++++++++++++++ > >> 3 files changed, 190 insertions(+) > >> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts > >> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi > >> > >> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > >> index ac17f60..7506b0d 100644 > >> --- a/arch/arm64/boot/dts/mediatek/Makefile > >> +++ b/arch/arm64/boot/dts/mediatek/Makefile > >> @@ -1,6 +1,7 @@ > >> # SPDX-License-Identifier: GPL-2.0 > >> dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb > >> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb > >> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6765-evb.dtb > >> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb > >> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb > >> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb > > > > As you can see, we have a long list of SoCs which are poorly supported. > > I'm not very keen to just add another SoC which supports booting into a ramdisk > > using the serial console. Do you have a roadmap adding mainline support for this > > SoC? > > Yes, that's a valid concern. > > mt6755 and mt6795 are in a similar state, the latter after three years. > I'm all for supporting new SoCs, but this feels looks a box-ticking > exercise ("hey, look, our SoC is supported in mainline") which doesn't > help anyone. > > My Ack still stands, but I'd definitely like to see some more complete > support before this patch goes in. > > Thanks, > > M. Yes, we do arrange more resources to do upstream task for mt6765, clk/pinctrl drivers are almost ready to submit. systimer is under reviewing (v9). http://lists.infradead.org/pipermail/linux-mediatek/2018-July/013989.html other drivers including pmic/pwrap/i2c/rtc/kpd/spi/wdt/cqdma/auxadc/pwm/cmdq/disp. We have dedicated owners to handle them and will cowork tightly with members to make sure things happen in the following weeks. For previous chips, we did have no enough support after shell. It is due to fast pace of smartphone SoC and other resource issues. We also know that is no excuse so that we already confirmed owners and their schedules for mt6765. If there is any suggestion, please let us know. Thanks.