Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp1880972imm; Tue, 10 Jul 2018 09:21:23 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfpDebttGUxZRr5fVvKTYN5SU4dpch7m7oPQD7Pqw56b+NqyPr5BmHX48TuZZ7Dy4OIGXw7 X-Received: by 2002:a17:902:321:: with SMTP id 30-v6mr25835090pld.122.1531239683620; Tue, 10 Jul 2018 09:21:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531239683; cv=none; d=google.com; s=arc-20160816; b=SPHGuoBgtkgL8iBXvvWa3Q15Nr1NTsAfVmof1vgMA4mxOzPbGBUZ+rAzMDboifzSBY NwW2Xz86wYdTF8x4M00kH0d+dWbZ5mouUIcFngDlRuTGoGqZD8Ku6KnsNCbVjuyTrCST vOxdSSlzrI0Fnrb8jl10C+s8/Wdtxa4oIpqew64K4GdwBv0PH2NOk+shrdztW+YYczm2 Qkx1jROr0DLpQrnavOM+vLe87bB3pzWCL1T80LMQm97gNjWpa5AqusF7F2Y9uKLsPHbz TJE7UKJuVSKZ9r4fzwEb2AH3wMN9hs6s/uKqZcQsE7icZU1/bRmVT3RaPHHNpHmwy7q7 ibNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :organization:references:in-reply-to:date:cc:to:from:subject :message-id:arc-authentication-results; bh=ojWRKmiMMwiNwOtkrt0Ot7OwjcFBva24OgERXckfa8M=; b=H796xL44Qd/kIwfNwBxoMcwHde/Q8EHXHHndY3416JSYgsCqvJOmRT+y6GwvMefpnh 7v93bt5ft0JwPa5G0zsNGKZLQEiaBliQiPIDX8MNwN5Dxtm8+As1jEBHelw2VMt1e1jO UgH7ztVRreU8mzznwiJBtgYCo3N6rk3i5zdDs+uHyig99rJ0BFK0STCJBkQNePqKkH7b /qd9gAHn2xnmGbLRgT6nG86IExEXNfW9zXdPAhVTAoJ4Dnm/CLnrktbKFBddNtXsHF6h 6xqU08QfCIjeF7unu0/B9kn/rTx4M/NAE5Q0hB2SAyC6pmGpuEzSf/AglhHY8EQGfR/d Uw3g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a84-v6si5552923pfj.300.2018.07.10.09.21.08; Tue, 10 Jul 2018 09:21:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934561AbeGJQT0 (ORCPT + 99 others); Tue, 10 Jul 2018 12:19:26 -0400 Received: from mga14.intel.com ([192.55.52.115]:15989 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934501AbeGJQTZ (ORCPT ); Tue, 10 Jul 2018 12:19:25 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Jul 2018 09:19:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,335,1526367600"; d="scan'208";a="73684449" Received: from smile.fi.intel.com (HELO smile) ([10.237.72.86]) by orsmga002.jf.intel.com with ESMTP; 10 Jul 2018 09:19:22 -0700 Message-ID: <8c5b6bbbde12b0836e1f833c86b805a817596654.camel@linux.intel.com> Subject: Re: [PATCH v4 3/3] serial: 8250_dw: add fractional divisor support From: Andy Shevchenko To: Jisheng Zhang , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Date: Tue, 10 Jul 2018 19:19:21 +0300 In-Reply-To: <20180710111516.13b8c570@xhacker.debian> References: <20180710110942.5b0a016e@xhacker.debian> <20180710111516.13b8c570@xhacker.debian> Organization: Intel Finland Oy Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.1-2 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2018-07-10 at 11:15 +0800, Jisheng Zhang wrote: > For Synopsys DesignWare 8250 uart which version >= 4.00a, there's a > valid divisor latch fraction register. The fractional divisor width is > 4bits ~ 6bits. > > Now the preparation is done, it's easy to add the feature support. > This patch firstly tries to get the fractional divisor width during > probe, then setups dw specific get_divisor() and set_divisor() hook. Thanks for an update, my comments below. > +/* > + * divisor = div(I) + div(F) > + * "I" means integer, "F" means fractional > + * quot = div(I) = clk / (16 * baud) > + * frac = div(F) * 2^dlf_size > + * > + * let rem = clk % (16 * baud) > + * we have: div(F) * (16 * baud) = rem > + * so frac = 2^dlf_size * rem / (16 * baud) = (rem << dlf_size) / (16 > * baud) > + */ > +static unsigned int dw8250_get_divisor(struct uart_port *p, > + unsigned int baud, > + unsigned int *frac) > +{ unsigned int base_baud = baud * 16; > + unsigned int quot, rem; > + struct dw8250_data *d = p->private_data; > + > + quot = p->uartclk / (16 * baud); > + rem = p->uartclk % (16 * baud); > + *frac = DIV_ROUND_CLOSEST(rem << d->dlf_size, 16 * baud); > + While it looks indeed better, I would rather like to have a confirmation it's working as designed. For example, when I did some calculus, I cooked a preliminary check in Python (easy and fast to prototype), for example: https://gist.github.com/andy-shev/06b084488b3629898121 in Python, or commit 9df461eca18f ("spi: pxa2xx: replace ugly table by approximation") in the kernel. Or another one here https://gist.github.com/andy-shev/8b2a73aeca2874f4cc 89 and commits c1a67b48f6a5 ("serial: 8250_pci: replace switch-case by formula for Intel MID"), 21947ba654a6 ("serial: 8250_pci: replace switch-case by formula") P.S. The code itself looks good to me, thanks! -- Andy Shevchenko Intel Finland Oy