Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp176816imm; Tue, 10 Jul 2018 23:59:52 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcLnrOxYrD1WH2qguZSm7xg4r5YKrvYCZdm1rJ70aYHjVG/fdzOqpEgVRWs01UwpcqsYODC X-Received: by 2002:a17:902:143:: with SMTP id 61-v6mr27325058plb.171.1531292392212; Tue, 10 Jul 2018 23:59:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531292392; cv=none; d=google.com; s=arc-20160816; b=oGXR6MDboIahEa6ljcSoFzIG+XOnu0V0grpQM70ZA+GkaPXQaNY+m4tLX4wq9ZhANn H3Z+a1X6/rRQgXvf1rmTYWjXF7hGX3e2JcFWjSCp5HFCtreuPTboIxGQVHoSvoQfqlE9 QRz1KGxxoM45RSeEFJNtPpt9KsTeN0zwR//NIpjAYeAHs5q6zeQj22y0xcc7H1u1If8T yBnF7Xthy+yAFCJSlNNe2/c/zPB7VdDAx0jlItP2abpZ6GkIiyY47SIlnnMHiw4+JEa/ PpZ/bcztoqtocsQuyyFt5rl5mLc/CSxgTlevFaVkE64O8GPriidpZfiaiG7dmvyrmpj+ 7Zxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=iXAmkOd2chnwxbDkX/h4OfHE+P0vAypRLLm+b0vy6xQ=; b=rFeoDCCnHqY4zLLW3PBE4g5O7j/sTvMU9ld7saxKi5ApDE/EXg64mORKO71cSk7kvq ij8a2QUlInLMK9Hg9MlPMNzFbSuW8GGy6y3LggZqQznOIDGyRUbLAcLuekvtq+Tc18Bs 2w4zepkmCJ/URP1J08OwHz2tg7tXwhvP7ErFmp8BOpQrfRudpFd8LdIM+PL4fAZ6+cUi h4bVfJe3pIehhxlOUT/gaOBcz6tu0QeUls73oak67OMpHQjYn8nt/a5OddtI8B7WISBX vXgkLaE7t/6G8mtIhHstVMU17iDCuQs7wApX48G/xh8c+HnT551X1scCbviiORXVkmm/ LQHw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x1-v6si18247181plv.520.2018.07.10.23.59.36; Tue, 10 Jul 2018 23:59:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726661AbeGKHAX (ORCPT + 99 others); Wed, 11 Jul 2018 03:00:23 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:50435 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726294AbeGKHAX (ORCPT ); Wed, 11 Jul 2018 03:00:23 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id EC42CF46028BA; Wed, 11 Jul 2018 14:57:33 +0800 (CST) Received: from vm107-55-164.huawei.com (100.107.55.164) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.382.0; Wed, 11 Jul 2018 14:57:24 +0800 From: Xiaowei Song To: , , , , , , , CC: , , Subject: [PATCH v6 1/1] PCI: kirin: Add MSI support Date: Wed, 11 Jul 2018 14:57:24 +0800 Message-ID: <20180711065724.128299-2-songxiaowei@hisilicon.com> X-Mailer: git-send-email 2.11.GIT In-Reply-To: <20180711065724.128299-1-songxiaowei@hisilicon.com> References: <20180711065724.128299-1-songxiaowei@hisilicon.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [100.107.55.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for MSI Signed-off-by: Xiaowei Song Signed-off-by: Yao Chen --- drivers/pci/dwc/pcie-kirin.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/pci/dwc/pcie-kirin.c b/drivers/pci/dwc/pcie-kirin.c index d2970a009eb5..369bf87d2fff 100644 --- a/drivers/pci/dwc/pcie-kirin.c +++ b/drivers/pci/dwc/pcie-kirin.c @@ -430,6 +430,9 @@ static int kirin_pcie_host_init(struct pcie_port *pp) { kirin_pcie_establish_link(pp); + if (IS_ENABLED(CONFIG_PCI_MSI)) + dw_pcie_msi_init(pp); + return 0; } @@ -445,9 +448,34 @@ static const struct dw_pcie_host_ops kirin_pcie_host_ops = { .host_init = kirin_pcie_host_init, }; +static int kirin_pcie_add_msi(struct dw_pcie *pci, + struct platform_device *pdev) +{ + int ret = 0; + + if (IS_ENABLED(CONFIG_PCI_MSI)) { + ret = platform_get_irq(pdev, 0); + if (ret < 0) { + dev_err(&pdev->dev, + "failed to get MSI IRQ (%d)\n", ret); + return ret; + } + + pci->pp.msi_irq = ret; + } + + return ret; +} + static int __init kirin_add_pcie_port(struct dw_pcie *pci, struct platform_device *pdev) { + int ret; + + ret = kirin_pcie_add_msi(pci, pdev); + if (ret < 0) + return ret; + pci->pp.ops = &kirin_pcie_host_ops; return dw_pcie_host_init(&pci->pp); -- 2.11.GIT