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[24.223.123.72]) by smtp.gmail.com with ESMTPSA id w84-v6sm5660625oie.40.2018.07.11.06.49.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Jul 2018 06:49:42 -0700 (PDT) Date: Wed, 11 Jul 2018 07:49:39 -0600 From: Rob Herring To: Amit Kucheria Cc: linux-kernel@vger.kernel.org, rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, vivek.gautam@codeaurora.org, andy.gross@linaro.org, Zhang Rui , Mark Rutland , linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v6 6/7] dt: thermal: tsens: Document the fallback DT property for v2 of TSENS IP Message-ID: <20180711134939.GA10268@rob-hp-laptop> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jul 09, 2018 at 05:13:28PM +0530, Amit Kucheria wrote: > We want to create common code for v2 of the TSENS IP block that is used in > a large number of Qualcomm SoCs. "qcom,tsens-v2" should be able to handle > most of the common functionality start with a common get_temp() function. > > It is also necessary to split out the memory regions for the TM and SROT > register banks because their offsets are not constant across SoC families. > > Signed-off-by: Amit Kucheria > --- > .../devicetree/bindings/thermal/qcom-tsens.txt | 25 +++++++++++++++++----- > 1 file changed, 20 insertions(+), 5 deletions(-) Reviewed-by: Rob Herring