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[209.132.180.67]) by mx.google.com with ESMTP id l184-v6si18859516pge.257.2018.07.11.07.42.22; Wed, 11 Jul 2018 07:42:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=D9Q45N1d; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388782AbeGKOpX (ORCPT + 99 others); Wed, 11 Jul 2018 10:45:23 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:35085 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388636AbeGKOpX (ORCPT ); Wed, 11 Jul 2018 10:45:23 -0400 Received: by mail-wm0-f68.google.com with SMTP id v3-v6so2852985wmh.0 for ; Wed, 11 Jul 2018 07:40:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=f06fbMsQugC2RwJhH1+A1CHNrcU97j0nq6PJpc50ctI=; b=D9Q45N1dAh0ju4n0uc+3d2gmRRYXUBkypnUz2rUNvh2e9EBQmEMha+FRNzlxA92yp5 fOJP4MTWFiKWitp2MU8B65wIF5pXENqE68qVA/tGmwE9LvsmMhM6OFx3MCUkeVMFaT+r qAKjKzhxGH0B17DMskK4LwZ7kPCD+VAh3KTeU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=f06fbMsQugC2RwJhH1+A1CHNrcU97j0nq6PJpc50ctI=; b=qIkCawlZcD7MNVddppYSzzgSiwbu0aPEdzqmbigQHyhNn8Ow63tlaNfFiwXRlqtKyE YstA8k+i2SxsqtdMyG3ZdBJsCvmXlSPdUUR9XJBFW0Lj3AVw95x7dxPEwoaMfwwuJFQw hZKqpKrh65PYLisSqgk8Lp5nniFfDBawfqDYpQQi+UCixQ8oSexBfwVhCN73GbJ1j7WJ kpNN2S9R1tauRZUxJn+MYB8szwpc52AisknZcO+7rdg14HlBtforlRhQD/x2TymIMV7b PzKWz2m5A9XkRboRbIzeIZFiGaCZix4U5MiBRKyyL/5arqOQSUIkTcbWNRGaiU6OrC1S ytjA== X-Gm-Message-State: AOUpUlEBc/L8hOMkMHQgSdSHVxuTRWzRRua+46S+XUSd6RSKUoEHcb51 sBq29f7CouyXxZIVfgol27/OklInFE44IrW4o6uoEvZ2 X-Received: by 2002:a1c:b143:: with SMTP id a64-v6mr10923486wmf.114.1531320042107; Wed, 11 Jul 2018 07:40:42 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Rob Herring Date: Wed, 11 Jul 2018 08:40:30 -0600 Message-ID: Subject: Re: [RFC PATCH 0/4] Stop losing firmware-set DMA masks To: Robin Murphy Cc: Christoph Hellwig , m.szyprowski@samsung.com, iommu@lists.linux-foundation.org, linux-arm-kernel , linux-acpi@vger.kernel.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , Lorenzo Pieralisi , hanjun.guo@linaro.org, Sudeep Holla , Rob Herring , Frank Rowand , Greg Kroah-Hartman , joro@8bytes.org, x86@kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 10, 2018 at 12:43 PM Robin Murphy wrote: > > Whilst the common firmware code invoked by dma_configure() initialises > devices' DMA masks according to limitations described by the respective > properties ("dma-ranges" for OF and _DMA/IORT for ACPI), the nature of > the dma_set_mask() API leads to that information getting lost when > well-behaved drivers probe and set a 64-bit mask, since in general > there's no way to tell the difference between a firmware-described mask > (which should be respected) and whatever default may have come from the > bus code (which should be replaced outright). This can break DMA on > systems with certain IOMMU topologies (e.g. [1]) where the IOMMU driver > only knows its maximum supported address size, not how many of those > address bits might actually be wired up between any of its input > interfaces and the associated DMA master devices. Similarly, some PCIe > root complexes only have a 32-bit native interface on their host bridge, > which leads to the same DMA-address-truncation problem in systems with a > larger physical memory map and RAM above 4GB (e.g. [2]). > > These patches attempt to deal with this in the simplest way possible by > generalising the specific quirk for 32-bit bridges into an arbitrary > mask which can then also be plumbed into the firmware code. In the > interest of being minimally invasive, I've only included a point fix > for the IOMMU issue as seen on arm64 - there may be further tweaks > needed in DMA ops to catch all possible incarnations of this problem, > but this initial RFC is mostly about the impact beyond the dma-mapping > subsystem itself. Couldn't you set and use the device's parent's dma_mask instead. At least for DT, we should always have a parent device representing the bus. That would avoid further bloating of struct device. Rob