Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp596418imm; Wed, 11 Jul 2018 07:50:46 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcMC4PAWfrtKXEAViB/0wGoSirUKYY2EhgVCjSNEh603isIFU7LK7DsNigqSECr+Q3UVHC6 X-Received: by 2002:a62:d842:: with SMTP id e63-v6mr30575195pfg.88.1531320646900; Wed, 11 Jul 2018 07:50:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531320646; cv=none; d=google.com; s=arc-20160816; b=IhETo8tOxMErM+hjdTorXiZDAk97j7SyI3nTt7fPl1wX3u1O8btzjagiX787uDVNlX HFcpsrPKHkNGyEIFfNc/tv08HDwI/Qj3WqjZYo33vOshiZ59R/1hnwb52Kj/+ih7PvK8 nuDFWJzwzeFUMkO5D5Gtdph7TbjaTjEZkOlT1yOGB8n/vS6NGgcS+10t/Dz/fgjxFFjC wUCjDZyROzMAC5qfEVpZltzs0cV2hHbkWggo6xXa5TSdBymZ77ijwYY8R9idQH2Y/u07 1gfOz9WqMB3/o8UQj0Zv+jXnSKd9T6tVMF6fkInHMwYkJJultSjtA+Bzkx6o5xDICoLg wiSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :organization:references:in-reply-to:date:cc:to:from:subject :message-id:arc-authentication-results; bh=fsK1l5GB7OgcvtEysvMHXEtFv+j/jWCt6QGmraTGoEQ=; b=mt3DCyjqOFCdHpbqESWtikEsYwsZnWJ+QjkvRbP86g8Y1vFg6EdOabVeoMe6kw2AQu YZWG8HzGeP5ooIEwiVvmkbYsID7QlxQxcluZKTTsZJ5NtzTuCRzF2VTlzX3UK3rf9qOG FYlP7+FrnvRIVzpDTwvz6jr+OQCQDzYY7YiI98zRrrdUWVsz1zMyKRbJ+rZxNcsPQ7gN fsVW/f/SOnN8LBZcelkxBRHkQAFEzg9I5Y/t6WT10E+o6WSGsr0E5Y3KhYqRPRHjZMoH yG7WX1gEAhUD2WHM+ZKg0bdSnYndKVTYcGI4GlpnHuOtOX10UbkYEs+tcci3L5VgQsPV UYaQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t8-v6si20240462ply.139.2018.07.11.07.50.31; Wed, 11 Jul 2018 07:50:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733209AbeGKLfH (ORCPT + 99 others); Wed, 11 Jul 2018 07:35:07 -0400 Received: from mga06.intel.com ([134.134.136.31]:34311 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733198AbeGKLfH (ORCPT ); Wed, 11 Jul 2018 07:35:07 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Jul 2018 04:31:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,338,1526367600"; d="scan'208";a="71407871" Received: from smile.fi.intel.com (HELO smile) ([10.237.72.86]) by fmsmga001.fm.intel.com with ESMTP; 11 Jul 2018 04:31:04 -0700 Message-ID: <2b363dc2f8ddd6fe52ba6f7c461b4dd55cfb8bce.camel@linux.intel.com> Subject: Re: [PATCH v5 3/3] serial: 8250_dw: add fractional divisor support From: Andy Shevchenko To: Jisheng Zhang , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Date: Wed, 11 Jul 2018 14:31:03 +0300 In-Reply-To: <20180711151111.6f417020@xhacker.debian> References: <20180710110942.5b0a016e@xhacker.debian> <20180710111516.13b8c570@xhacker.debian> <20180711151111.6f417020@xhacker.debian> Organization: Intel Finland Oy Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.1-2 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2018-07-11 at 15:11 +0800, Jisheng Zhang wrote: > For Synopsys DesignWare 8250 uart which version >= 4.00a, there's a > valid divisor latch fraction register. The fractional divisor width is > 4bits ~ 6bits. > > Now the preparation is done, it's easy to add the feature support. > This patch firstly tries to get the fractional divisor width during > probe, then setups dw specific get_divisor() and set_divisor() hook. > You would need to resend entire series as v6. Don't forget to add given tags. But, wait a bit, I would like to check the algo (thanks for C program!). -- Andy Shevchenko Intel Finland Oy