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[209.132.180.67]) by mx.google.com with ESMTP id d22-v6si16163160pgl.391.2018.07.11.17.09.20; Wed, 11 Jul 2018 17:09:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@google.com header.s=20161025 header.b=bRRv9Qzj; dkim=fail header.i=@chromium.org header.s=google header.b=XF1kMWmo; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389252AbeGKSmo (ORCPT + 99 others); Wed, 11 Jul 2018 14:42:44 -0400 Received: from mail-ua0-f195.google.com ([209.85.217.195]:33673 "EHLO mail-ua0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388986AbeGKSmo (ORCPT ); Wed, 11 Jul 2018 14:42:44 -0400 Received: by mail-ua0-f195.google.com with SMTP id i4-v6so9946507uak.0 for ; Wed, 11 Jul 2018 11:37:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=xqZ2dSxzOUMe1Bz8rDCrWpiBkj9Gp8F7NFF29IVWX7g=; b=bRRv9QzjWxQ/SbRqtVqlhQXVFbAr3YsdGN5Xo1vBz44ApT98128QxnMAwG06a57D4k UPxrIN/N1Aj7cuBelHKsRSQz0r4P2wC3cdCHAaiJz5wwmXofZofedo8rAzbhteXJvSBn Cqp+zL11JGXiGPrFtmsXfyLAV2HyXa/5yXbv1GDgvaYDAx3BHELWLVg6rmAam5qcMpC+ 88bv5YPSv0JuRzUdqLDiTcQ4giGELmc16ljUAv879OHfGWeBwerKRynWSxJVY1PU3Rpm jYaPJOce9GS7bDkEeqktakBeEnYeYyJ39L/svnHQ0K8k/yJR5lu4kpv/5KZgVSA91Laz OHuA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=xqZ2dSxzOUMe1Bz8rDCrWpiBkj9Gp8F7NFF29IVWX7g=; b=XF1kMWmolw88q2HpGsX0eE6/FHTpHVXFPyg0VAQNxi1/ILiVCQS1S3rpV4I8vYZbi9 DVpBvmVBnYI+a1CA4GOSbPSo2MCucchEghYNYXbrYcL2W4VDNanvRYG204+dfdCwSNGH aimQa7m7eFudaGbHKyypcMzB3x8r6b7o+xDcs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=xqZ2dSxzOUMe1Bz8rDCrWpiBkj9Gp8F7NFF29IVWX7g=; b=boGDFR5L7TK2ZM0Ku2ib+kwiC50NQXhxILNNpcV8F+ae9jmZWLIfPNigFQUngmYkjD 68iLR7L6DdCYScneVusZYhLaH9ZKi9AaW81XxBEM9aP1nZD5lGTbfFVeQMPgjAjfYDU1 e/DdSn5TmfFRG+aIPBGiOdSJslm4QXLJBrj1BiY/trOjrG7ICQsFMNj2GIYOz2+knPaD NNCJrrNbf6La0SzHwnH7K1zoW+OoQJdqF639yDMh5ZAhTZUXWRvgD1GakJVjZN3noLKV pIngRqOtXQjnCPeRa676oTeyFlS4WywvHjlLC4ny8WXimMXK6JtQLrjor0I6Xnv16f7+ U73g== X-Gm-Message-State: APt69E2yiJqHHYF13hc9IYul5TwOVey6TvVCR4APPJxQG769dH1mZRbW aXJxEo3M58UswHHaq8BE0Umdpw7gGwOYhoW5O3Kuzg== X-Received: by 2002:ab0:4946:: with SMTP id a6-v6mr19222243uad.82.1531334228082; Wed, 11 Jul 2018 11:37:08 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a1f:9495:0:0:0:0:0 with HTTP; Wed, 11 Jul 2018 11:37:07 -0700 (PDT) In-Reply-To: References: From: Doug Anderson Date: Wed, 11 Jul 2018 11:37:07 -0700 X-Google-Sender-Auth: Jc_rxfarNehnjvDkxnRDB0NaV-M Message-ID: Subject: Re: [PATCH v6 2/7] thermal: tsens: Add support to split up register address space into two To: Amit Kucheria Cc: LKML , Rajendra Nayak , linux-arm-msm , Bjorn Andersson , Eduardo Valentin , smohanad@codeaurora.org, Vivek Gautam , Andy Gross , Zhang Rui , linux-pm@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, Jul 9, 2018 at 4:43 AM, Amit Kucheria wrote: > There are two banks of registers for v2 TSENS IPs: SROT and TM. On older > SoCs these were contiguous, leading to DTs mapping them as one register > address space of size 0x2000. In newer SoCs, these two banks are not > contiguous anymore. > > Fixing old DTs to split the address space into allows us to have cleaner > common code e.g. get_temp() that is shared across new and old platforms. This makes it sound like old DTs won't be supported anymore. ...but the code says otherwise. I'd just remove the above paragraph. > @@ -126,11 +127,21 @@ static const struct regmap_config tsens_config = { > int __init init_common(struct tsens_device *tmdev) > { > void __iomem *base; > + struct platform_device *op = of_find_device_by_node(tmdev->dev->of_node); > > + if (!op) > + return -EINVAL; > base = of_iomap(tmdev->dev->of_node, 0); > if (!base) > return -EINVAL; > > + if (op->num_resources > 1) { Maybe add a comment here that says that we don't actually map the SROT yet because you don't read anything from there? I kept getting confused about how this patch could possibly work with no code to map SROT... > + tmdev->tm_offset = 0; > + } else { > + /* old DTs where SROT and TM were in a contiguous 2K block */ > + tmdev->tm_offset = 0x1000; This patch without patch #4 will break compatibility. You should squash part of patch #4 into this one, specifically: -#define STATUS_OFFSET 0x10a0 -#define LAST_TEMP_MASK 0xfff +#define STATUS_OFFSET 0xa0 +#define LAST_TEMP_MASK 0xfff Without that you break bisect-ability and also confuse anyone trying to look at this patch. -Doug