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[209.132.180.67]) by mx.google.com with ESMTP id m6-v6si20574414pgn.603.2018.07.11.19.54.38; Wed, 11 Jul 2018 19:54:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388539AbeGKVFd (ORCPT + 99 others); Wed, 11 Jul 2018 17:05:33 -0400 Received: from mga04.intel.com ([192.55.52.120]:23333 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733021AbeGKVFd (ORCPT ); Wed, 11 Jul 2018 17:05:33 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Jul 2018 13:59:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,339,1526367600"; d="scan'208";a="66205693" Received: from 2b52.sc.intel.com ([143.183.136.52]) by orsmga003.jf.intel.com with ESMTP; 11 Jul 2018 13:59:22 -0700 Message-ID: <1531342544.15351.37.camel@intel.com> Subject: Re: [RFC PATCH v2 27/27] x86/cet: Add arch_prctl functions for CET From: Yu-cheng Yu To: Jann Horn Cc: the arch/x86 maintainers , "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , kernel list , linux-doc@vger.kernel.org, Linux-MM , linux-arch , Linux API , Arnd Bergmann , Andy Lutomirski , bsingharora@gmail.com, Cyrill Gorcunov , Dave Hansen , Florian Weimer , hjl.tools@gmail.com, Jonathan Corbet , keescook@chromiun.org, Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , ravi.v.shankar@intel.com, vedvyas.shanbhogue@intel.com Date: Wed, 11 Jul 2018 13:55:44 -0700 In-Reply-To: References: <20180710222639.8241-1-yu-cheng.yu@intel.com> <20180710222639.8241-28-yu-cheng.yu@intel.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.18.5.2-0ubuntu3.2 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2018-07-11 at 12:45 -0700, Jann Horn wrote: > On Tue, Jul 10, 2018 at 3:31 PM Yu-cheng Yu > wrote: > > > > > > arch_prctl(ARCH_CET_STATUS, unsigned long *addr) > >     Return CET feature status. > > > >     The parameter 'addr' is a pointer to a user buffer. > >     On returning to the caller, the kernel fills the following > >     information: > > > >     *addr = SHSTK/IBT status > >     *(addr + 1) = SHSTK base address > >     *(addr + 2) = SHSTK size > > > > arch_prctl(ARCH_CET_DISABLE, unsigned long features) > >     Disable SHSTK and/or IBT specified in 'features'.  Return > > -EPERM > >     if CET is locked out. > > > > arch_prctl(ARCH_CET_LOCK) > >     Lock out CET feature. > > > > arch_prctl(ARCH_CET_ALLOC_SHSTK, unsigned long *addr) > >     Allocate a new SHSTK. > > > >     The parameter 'addr' is a pointer to a user buffer and > > indicates > >     the desired SHSTK size to allocate.  On returning to the caller > >     the buffer contains the address of the new SHSTK. > > > > arch_prctl(ARCH_CET_LEGACY_BITMAP, unsigned long *addr) > >     Allocate an IBT legacy code bitmap if the current task does not > >     have one. > > > >     The parameter 'addr' is a pointer to a user buffer. > >     On returning to the caller, the kernel fills the following > >     information: > > > >     *addr = IBT bitmap base address > >     *(addr + 1) = IBT bitmap size > > > > Signed-off-by: H.J. Lu > > Signed-off-by: Yu-cheng Yu > [...] > > > > diff --git a/arch/x86/kernel/cet_prctl.c > > b/arch/x86/kernel/cet_prctl.c > > new file mode 100644 > > index 000000000000..86bb78ae656d > > --- /dev/null > > +++ b/arch/x86/kernel/cet_prctl.c > > @@ -0,0 +1,141 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +/* See Documentation/x86/intel_cet.txt. */ > > + > > +static int handle_get_status(unsigned long arg2) > > +{ > > +       unsigned int features = 0; > > +       unsigned long shstk_base, shstk_size; > > + > > +       if (current->thread.cet.shstk_enabled) > > +               features |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; > > +       if (current->thread.cet.ibt_enabled) > > +               features |= GNU_PROPERTY_X86_FEATURE_1_IBT; > > + > > +       shstk_base = current->thread.cet.shstk_base; > > +       shstk_size = current->thread.cet.shstk_size; > > + > > +       if (in_ia32_syscall()) { > > +               unsigned int buf[3]; > > + > > +               buf[0] = features; > > +               buf[1] = (unsigned int)shstk_base; > > +               buf[2] = (unsigned int)shstk_size; > > +               return copy_to_user((unsigned int __user *)arg2, > > buf, > > +                                   sizeof(buf)); > > +       } else { > > +               unsigned long buf[3]; > > + > > +               buf[0] = (unsigned long)features; > > +               buf[1] = shstk_base; > > +               buf[2] = shstk_size; > > +               return copy_to_user((unsigned long __user *)arg2, > > buf, > > +                                   sizeof(buf)); > > +       } > Other places in the kernel (e.g. the BPF subsystem) just > unconditionally use u64 instead of unsigned long to avoid having to > switch between different sizes. I wonder whether that would make > sense > here? Yes, that simplifies the code.  I will make that change. Yu-cheng