Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp1205363imm; Wed, 11 Jul 2018 20:06:32 -0700 (PDT) X-Google-Smtp-Source: AAOMgpeX9TC30RCBLAKh1skFvJAkeVK2tbOh11fSyf7OdOFvXjzfgR2cSLHX8VjalV4eV0zYJ6JD X-Received: by 2002:a17:902:4101:: with SMTP id e1-v6mr450569pld.205.1531364792689; Wed, 11 Jul 2018 20:06:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531364792; cv=none; d=google.com; s=arc-20160816; b=pnvhuyErpSGijQc7bq3eQMuhtNTeQT2x9MlQwwNzBmRAJYLgc6uMgNboKQjQu0OeZN id8ZjaVhcHY7sqeOUhVvO2env744d4hoLjJy5lBQhB8Y7Cp67JnbGqmc7IHqcp39OIcH BX9zyCqFGD2/BOjtB7HTeHC7P1N3ngNa/J4VdUWKmNHI0BGP9w1YGIoGrRvQ2ihGN4vP H/7RaK9Cfbwf7YHqzhposm/eSJAzIc+mgTYXkEQEY7jZQYBeyk0kNlsiqoIcouzP+lZP hibDKcaERZIqWz5CXzY73q8jZ1yKPJf0MWF3nGJ4V2NrLv/tEgRitI/YE5ja7aNlmIXh 1buw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:arc-authentication-results; bh=/GAOlPwaUzIi9f3EYUTM5VWH/wYEMnJ/gZbEW21Vmew=; b=p4QvE0axriuvsIqBZGt11MiGUF1EmsfyIHvD6IGaeaxF4MkydCGqnY3LVCRCEtrUxP /8dUmzC/RB6BxGHMP8AUHBRRhPrhRRzRMhp1uvbj3ZMQ1JdaeX+KaP+EVIY6uATi5ndK 8ww05183VLzie8sfe8rsHLLpkWKNA0UwsKFPzU+8huc6b/EHsvhcNt01QhzZO4H4V00C aGd5AsP5QiFXmoihl/GzRVk2uj9sCM897g0PiGgMZ7ACbuZWbhaJB9FBupz5scpky5bB jA5czivt0enjfuKRCoz4x4Lwj3K7i4X2bmQZr+aWrkbuISKKI/Mol0mbSYmk3nF7doyq 2H7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@oracle.com header.s=corp-2018-07-02 header.b="FqgE/NdL"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=oracle.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p22-v6si20581703plo.141.2018.07.11.20.06.17; Wed, 11 Jul 2018 20:06:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@oracle.com header.s=corp-2018-07-02 header.b="FqgE/NdL"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=oracle.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390916AbeGLANI (ORCPT + 99 others); Wed, 11 Jul 2018 20:13:08 -0400 Received: from aserp2130.oracle.com ([141.146.126.79]:39128 "EHLO aserp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388528AbeGLANI (ORCPT ); Wed, 11 Jul 2018 20:13:08 -0400 Received: from pps.filterd (aserp2130.oracle.com [127.0.0.1]) by aserp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w6C048YL177870; Thu, 12 Jul 2018 00:04:50 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : subject : date : message-id : in-reply-to : references; s=corp-2018-07-02; bh=/GAOlPwaUzIi9f3EYUTM5VWH/wYEMnJ/gZbEW21Vmew=; b=FqgE/NdLKRZcTuA1S2LUEZVzHBH2NQEN4n20GzA4Dh6ysPXvhAgU9g8p4Y0hThaswQBb D9pySgcuO0ni08LUW/RMg/LgQdM+/Beuz617d/Fe2rTlfBJh9hfBYZRbOKK9hnYIKsmM z9ZJJx13cE8NMqakHh19eaxWki1anUi53ppPbC6Mir10YMiyclgeIWSvyJrlBjUOgPb8 JqjI7pyx/dv51WTIuhMQv1YC5cMfqtZes19IDcy4BgFFmnHzA1vMs6COeHCNBvt2E7Jy ehitoq+WU7gIuJWP6LhqMYRqtwrVizupHuuoDaYxrPDD9UYVhCYXtVFHHTB4yUQqIHlO Bw== Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by aserp2130.oracle.com with ESMTP id 2k2p760975-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 12 Jul 2018 00:04:50 +0000 Received: from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w6C04oK1017219 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 12 Jul 2018 00:04:50 GMT Received: from abhmp0003.oracle.com (abhmp0003.oracle.com [141.146.116.9]) by aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w6C04o0e032021; Thu, 12 Jul 2018 00:04:50 GMT Received: from localhost.localdomain (/73.69.118.222) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Wed, 11 Jul 2018 17:04:49 -0700 From: Pavel Tatashin To: steven.sistare@oracle.com, daniel.m.jordan@oracle.com, linux@armlinux.org.uk, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, john.stultz@linaro.org, sboyd@codeaurora.org, x86@kernel.org, linux-kernel@vger.kernel.org, mingo@redhat.com, tglx@linutronix.de, hpa@zytor.com, douly.fnst@cn.fujitsu.com, peterz@infradead.org, prarit@redhat.com, feng.tang@intel.com, pmladek@suse.com, gnomes@lxorguk.ukuu.org.uk, linux-s390@vger.kernel.org, pasha.tatashin@oracle.com, boris.ostrovsky@oracle.com, jgross@suse.com Subject: [PATCH v13 13/18] x86/tsc: calibrate tsc only once Date: Wed, 11 Jul 2018 20:04:14 -0400 Message-Id: <20180712000419.5165-14-pasha.tatashin@oracle.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180712000419.5165-1-pasha.tatashin@oracle.com> References: <20180712000419.5165-1-pasha.tatashin@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8951 signatures=668706 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1806210000 definitions=main-1807110252 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org During boot tsc is calibrated twice: once in tsc_early_delay_calibrate(), and the second time in tsc_init(). Rename tsc_early_delay_calibrate() to tsc_early_init(), and rework it so the calibration is done only early, and make tsc_init() to use the values already determined in tsc_early_init(). Sometimes it is not possible to determine tsc early, as the subsystem that is required is not yet initialized, in such case try again later in tsc_init(). Suggested-by: Thomas Gleixner Signed-off-by: Pavel Tatashin --- arch/x86/include/asm/tsc.h | 2 +- arch/x86/kernel/setup.c | 2 +- arch/x86/kernel/tsc.c | 86 ++++++++++++++++++++------------------ 3 files changed, 48 insertions(+), 42 deletions(-) diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 2701d221583a..c4368ff73652 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -33,7 +33,7 @@ static inline cycles_t get_cycles(void) extern struct system_counterval_t convert_art_to_tsc(u64 art); extern struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns); -extern void tsc_early_delay_calibrate(void); +extern void tsc_early_init(void); extern void tsc_init(void); extern void mark_tsc_unstable(char *reason); extern int unsynchronized_tsc(void); diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 01fcc8bf7c8f..07445482bb57 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1014,7 +1014,7 @@ void __init setup_arch(char **cmdline_p) */ init_hypervisor_platform(); - tsc_early_delay_calibrate(); + tsc_early_init(); x86_init.resources.probe_roms(); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 186395041725..bc8eb82050a3 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -33,6 +33,8 @@ EXPORT_SYMBOL(cpu_khz); unsigned int __read_mostly tsc_khz; EXPORT_SYMBOL(tsc_khz); +#define KHZ 1000 + /* * TSC can be unstable due to cpufreq or due to unsynced TSCs */ @@ -1335,34 +1337,10 @@ static int __init init_tsc_clocksource(void) */ device_initcall(init_tsc_clocksource); -void __init tsc_early_delay_calibrate(void) -{ - unsigned long lpj; - - if (!boot_cpu_has(X86_FEATURE_TSC)) - return; - - cpu_khz = x86_platform.calibrate_cpu(); - tsc_khz = x86_platform.calibrate_tsc(); - - tsc_khz = tsc_khz ? : cpu_khz; - if (!tsc_khz) - return; - - lpj = tsc_khz * 1000; - do_div(lpj, HZ); - loops_per_jiffy = lpj; -} - -void __init tsc_init(void) +static bool determine_cpu_tsc_frequncies(void) { - u64 lpj, cyc; - int cpu; - - if (!boot_cpu_has(X86_FEATURE_TSC)) { - setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); - return; - } + /* Make sure that cpu and tsc are not already calibrated */ + WARN_ON(cpu_khz || tsc_khz); cpu_khz = x86_platform.calibrate_cpu(); tsc_khz = x86_platform.calibrate_tsc(); @@ -1377,20 +1355,51 @@ void __init tsc_init(void) else if (abs(cpu_khz - tsc_khz) * 10 > tsc_khz) cpu_khz = tsc_khz; - if (!tsc_khz) { - mark_tsc_unstable("could not calculate TSC khz"); - setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); - return; - } + if (tsc_khz == 0) + return false; pr_info("Detected %lu.%03lu MHz processor\n", - (unsigned long)cpu_khz / 1000, - (unsigned long)cpu_khz % 1000); + (unsigned long)cpu_khz / KHZ, + (unsigned long)cpu_khz % KHZ); if (cpu_khz != tsc_khz) { pr_info("Detected %lu.%03lu MHz TSC", - (unsigned long)tsc_khz / 1000, - (unsigned long)tsc_khz % 1000); + (unsigned long)tsc_khz / KHZ, + (unsigned long)tsc_khz % KHZ); + } + return true; +} + +static unsigned long get_loops_per_jiffy(void) +{ + unsigned long lpj = tsc_khz * KHZ; + + do_div(lpj, HZ); + return lpj; +} + +void __init tsc_early_init(void) +{ + if (!boot_cpu_has(X86_FEATURE_TSC)) + return; + if (!determine_cpu_tsc_frequncies()) + return; + loops_per_jiffy = get_loops_per_jiffy(); +} + +void __init tsc_init(void) +{ + if (!boot_cpu_has(X86_FEATURE_TSC)) { + setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); + return; + } + + if (!tsc_khz) { + /* We failed to determine frequencies earlier, try again */ + if (!determine_cpu_tsc_frequncies()) { + mark_tsc_unstable("could not calculate TSC khz"); + return; + } } /* Sanitize TSC ADJUST before cyc2ns gets initialized */ @@ -1413,10 +1422,7 @@ void __init tsc_init(void) if (!no_sched_irq_time) enable_sched_clock_irqtime(); - lpj = ((u64)tsc_khz * 1000); - do_div(lpj, HZ); - lpj_fine = lpj; - + lpj_fine = get_loops_per_jiffy(); use_tsc_delay(); check_system_tsc_reliable(); -- 2.18.0