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[209.132.180.67]) by mx.google.com with ESMTP id g6-v6si18987988pgq.240.2018.07.11.22.58.11; Wed, 11 Jul 2018 22:58:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Th22sS+O; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726876AbeGLGEh (ORCPT + 99 others); Thu, 12 Jul 2018 02:04:37 -0400 Received: from mail-qt0-f193.google.com ([209.85.216.193]:42415 "EHLO mail-qt0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726777AbeGLGEh (ORCPT ); Thu, 12 Jul 2018 02:04:37 -0400 Received: by mail-qt0-f193.google.com with SMTP id z8-v6so14664371qto.9 for ; Wed, 11 Jul 2018 22:56:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=ADhLezP4YUM0VGOUcDvLECpa2gua6Ymylh810Kzc9iA=; b=Th22sS+O5NzREVeIa8qQXTRkUEt1xu+WV6QQ1zTcsyhajrzfa7Q9FMtIsR0f4FdCya vACfT3x8WomeLyXHkCGElEFZlAguiX1lHV9Nv5rWI5RfW6gvlKad2U3izer8VtPMBcJJ SYX1RvSwVw5jfQeWZFtAAzqJIh+AJDAU2M47s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ADhLezP4YUM0VGOUcDvLECpa2gua6Ymylh810Kzc9iA=; b=jARossAv9t4iCKMrRL6uqmz1Xoi6Ot6OrmWw31tcIDp5/V7ehpjlpMfT/KFN2msHOd NDlUpdBZ4riKP/uNXP1XnaTKybBnp/GzQZMBx6EUGHAAm90HplbeliN9NYLwBa0+v8+P J70UFytLZZPYMeBrxcAe93hqxXQf6E3BfF0Z0N7hATkJwco7ctFs+iLniq4LXmqfcLvK o4KDOOidMu5WMoM7MqxVrbft8FWJCXC/H1UkQpcSU7qUvCSkW/fnO+0v1jrM1kA/BhoH /vqm07cMoTRc4dLcqjRuycTbrEGMs2t9JmIV1vFMYpYFuM2CpZ+qzyoh1yhvG7402Cke da7w== X-Gm-Message-State: AOUpUlFVCF8I4LAdHqfQ1mA9VVsC2hC1yzfvVQst6hmFTGnYw+L6kr3c GAXcKe3ZQn4A7MI61WU29eO+ZMrERwHcvXwd1NWnvQ== X-Received: by 2002:aed:244c:: with SMTP id s12-v6mr708465qtc.74.1531374997810; Wed, 11 Jul 2018 22:56:37 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Amit Kucheria Date: Thu, 12 Jul 2018 11:26:25 +0530 Message-ID: Subject: Re: [PATCH v6 6/7] dt: thermal: tsens: Document the fallback DT property for v2 of TSENS IP To: Doug Anderson Cc: Linux Kernel Mailing List , Rajendra Nayak , linux-arm-msm , Bjorn Andersson , Eduardo Valentin , smohanad@codeaurora.org, Vivek Gautam , Andy Gross , Zhang Rui , Rob Herring , Mark Rutland , Linux PM list , DTML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 12, 2018 at 12:12 AM Doug Anderson wrote: > > Hi, > > On Mon, Jul 9, 2018 at 4:43 AM, Amit Kucheria wrote: > > We want to create common code for v2 of the TSENS IP block that is used in > > a large number of Qualcomm SoCs. "qcom,tsens-v2" should be able to handle > > most of the common functionality start with a common get_temp() function. > > > > It is also necessary to split out the memory regions for the TM and SROT > > register banks because their offsets are not constant across SoC families. > > nit that bindings should be earlier in the patch series than the code > implementing the bindings. Will reorder. > > > Signed-off-by: Amit Kucheria > > --- > > .../devicetree/bindings/thermal/qcom-tsens.txt | 25 +++++++++++++++++----- > > 1 file changed, 20 insertions(+), 5 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt > > index 06195e8..8f963b1 100644 > > --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt > > +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt > > @@ -1,10 +1,16 @@ > > * QCOM SoC Temperature Sensor (TSENS) > > > > Required properties: > > -- compatible : > > - - "qcom,msm8916-tsens" : For 8916 Family of SoCs > > - - "qcom,msm8974-tsens" : For 8974 Family of SoCs > > - - "qcom,msm8996-tsens" : For 8996 Family of SoCs > > +- compatible: > > + Must be one of the following: > > + - "qcom,msm8916-tsens" (MSM8916) > > + - "qcom,msm8974-tsens" (MSM8974) > > + - "qcom,msm8996-tsens" (MSM8996) > > + - "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998) > > + - "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845) > > + The generic "qcom,tsens-v2" property must be used as a fallback for any SoC with > > + version 2 of the TSENS IP. MSM8996 is the only exception beacause the generic > > + property did not exist when support was added. > > > > - reg: Address range of the thermal registers > > You need to document that for old SoCs where TM / SROT were 0x1000 > apart (SROT first) that one "reg" field was OK. ...and that for new > SoCs you specify two reg ranges: the first for TM and the second for > SROT. OK. > > - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. > > @@ -12,7 +18,7 @@ Required properties: > > - Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify > > nvmem cells > > > > -Example: > > +Example 1 (legacy support before a fallback tsens-v2 propoerty was introduced): > > tsens: thermal-sensor@900000 { > > compatible = "qcom,msm8916-tsens"; > > reg = <0x4a8000 0x2000>; > > @@ -20,3 +26,12 @@ tsens: thermal-sensor@900000 { > > nvmem-cell-names = "caldata", "calsel"; > > #thermal-sensor-cells = <1>; > > }; > > + > > +Example 2 (for any platform containing v2 of the TSENS IP): > > +tsens0: tsens@c222000 { > > A) Use a generic name for the node, not a specific one. Thus the node > should be "thermal-sensor", not "tsens". > > B) This unit address needs to match the _first_ reg address listed. > Give your reg below, this should be @c263000 > > Thus your node name should be: > > tsens0: thermal-sensor@c263000 { Fixed > > + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; > > + reg = <0xc263000 0x1ff>, /* TM */ > > + <0xc222000 0x1ff>; /* SROT */ > > + #qcom,sensors = <13>; > > The "#qcom,sensors" property seems wrong in a few ways: > > A) I wouldn't have expected it to start with a "#". I only expect to > see that on things specifying sizes / lengths. Rob can feel free to > override me, though. > > B) It's not documented above. Just putting something in an example > doesn't document it--it needs to be listed in the "Optional > properties".