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[209.132.180.67]) by mx.google.com with ESMTP id g12-v6si21233575pfh.346.2018.07.12.01.40.50; Thu, 12 Jul 2018 01:41:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IjdOWZus; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732355AbeGLIsJ (ORCPT + 99 others); Thu, 12 Jul 2018 04:48:09 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:51801 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726528AbeGLIsJ (ORCPT ); Thu, 12 Jul 2018 04:48:09 -0400 Received: by mail-wm0-f68.google.com with SMTP id s12-v6so4844760wmc.1 for ; Thu, 12 Jul 2018 01:39:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=GOXWl/z34hHA2XGqcYPCz7CNtTJlW95blvBhKy5ro8Q=; b=IjdOWZusOrcLQrmlweJfvJROXyS7Yga0Qx1nAdxfWEI8g1afIMknXwxQb3u/jTFQ3B SBAux/b1HsaywBtXfeNy34NdcZBlnaIzqRCvYJ0smOng4ZdtnfN2RNFv3RtF3hTVQJd2 sExRkayL5EitzIsDrZ3SmxeAUtP9KgigMaseg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=GOXWl/z34hHA2XGqcYPCz7CNtTJlW95blvBhKy5ro8Q=; b=P1MUdMBK0UKxjHUrpiwnJ/VXEpEzxfqKerxzldct0wpn5/GgkPMiN1IpBEKXBDyL9B dD29L6NTIDSn362A4D6u3Pzt2sa0DYl1/TamegdsWvq8yAeIEKnoUCuwUY+ILbd4RQ// llUvSY7wT05uJiVW9coVhYgR03cMBRIDMf/ILzlUTds/o8TK0k0596FpcwyJvV1wwUrz OR92xORkD9W3/LVartiOlQDf41p9mq1nm8FiGZzaVY2XXCORBbIpnLJj4ljLx5UbWCIB S/UdnGq68Hb5NGw4fxHHNM7EeQ+Vj/a+65524QBUMTNxuxWKi+QLQFO63xop8tpLhtE6 QbZw== X-Gm-Message-State: AOUpUlHOXC6CWDywexqRnN7vSL89Sg5WojgxvEJGdQp3Bll6Z4VXEk01 kU32p+EFPWKllXvPRdEqGBTnUfcE0rQ= X-Received: by 2002:a1c:4c0e:: with SMTP id z14-v6mr795833wmf.89.1531384772863; Thu, 12 Jul 2018 01:39:32 -0700 (PDT) Received: from localhost ([103.249.91.93]) by smtp.gmail.com with ESMTPSA id l6-v6sm2979179wmh.41.2018.07.12.01.39.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 12 Jul 2018 01:39:32 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, vivek.gautam@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, Kees Cook , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-soc@vger.kernel.org Subject: [PATCH v7 0/7] thermal: tsens: Refactoring for TSENSv2 IP Date: Thu, 12 Jul 2018 14:09:01 +0530 Message-Id: X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series is a mixed bag: - Some code moves to allow code sharing between different SoCs with v2 of the TSENS IP, - a generic qcom,tsens-v2 property as a fallback compatible for all v2.x.y platforms, - new platform support (sdm845) - a cleanup patch and - a DT change to have a common way to deal with the SROT and TM registers despite slightly different features across the IP family and different register offsets. Changes since v6: - Fix comments and patch descriptions as per Doug's review - Rename tsens to thermal-sensor in DT - Add various review tags Changes since v5: - Actually fix unit addressses for the two tsens blocks as per Stephen's comment. Changes since v4: - Revert back to a single fallback bindind qcom,tsens-v2 as per Rob's suggestion. - Rework how old (unsplit SROT and TM address space) DTs are handled by needing a 0x1000 offset but still sharing common code in tsens-v2.c - Remove the patch to added TRDY checks while we investigate Matthias' reports - Fix unit addressses for the two tsens blocks as per Stephen's comment. Changes since v3: - Introduce qcom,tsens-v2.4.0 property and make qcom,tsens-v2 a fallback, compatible property. - Rename ops_v2 to ops_generic_v2 Changes since v2: - Based on review, moved tsens-8996.c to tsens-v2.c and changed corresponding function names, struct names to allow for generic tsensv2 platforms - All v2 platforms will now only need to use the qcom,tsen-v2 property - Added a DT patch to initialize tsens driver on sdm845, now that 4.18-rc1 will contain an sdm845.dtsi Changes since v1: - Move get_temp() from tsens-8996 to tsens-common and rename - Change 8996 DT entry to allow init_common() to work across sdm845 and 8996 due to different offsets Amit Kucheria (7): thermal: tsens: Get rid of unused fields in structure thermal: tsens: Add support to split up register address space into two arm64: dts: msm8996: thermal: Initialise via DT and add second controller thermal: tsens: Rename tsens-8996 to tsens-v2 for reuse dt: thermal: tsens: Document the fallback DT property for v2 of TSENS IP thermal: tsens: Add generic support for TSENS v2 IP arm64: dts: sdm845: Add tsens nodes .../devicetree/bindings/thermal/qcom-tsens.txt | 31 +++++++++++++++++---- arch/arm64/boot/dts/qcom/msm8996.dtsi | 14 ++++++++-- arch/arm64/boot/dts/qcom/sdm845.dtsi | 16 +++++++++++ drivers/thermal/qcom/Makefile | 2 +- drivers/thermal/qcom/tsens-common.c | 12 ++++++++ drivers/thermal/qcom/{tsens-8996.c => tsens-v2.c} | 32 ++++++++++------------ drivers/thermal/qcom/tsens.c | 3 ++ drivers/thermal/qcom/tsens.h | 8 ++++-- 8 files changed, 88 insertions(+), 30 deletions(-) rename drivers/thermal/qcom/{tsens-8996.c => tsens-v2.c} (64%) -- 2.7.4