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[209.132.180.67]) by mx.google.com with ESMTP id q5-v6si13038379pgn.95.2018.07.12.05.53.33; Thu, 12 Jul 2018 05:53:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732430AbeGLNCS (ORCPT + 99 others); Thu, 12 Jul 2018 09:02:18 -0400 Received: from mga17.intel.com ([192.55.52.151]:58919 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727092AbeGLNCR (ORCPT ); Thu, 12 Jul 2018 09:02:17 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jul 2018 05:52:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,343,1526367600"; d="scan'208";a="244688994" Received: from ahunter-desktop.fi.intel.com (HELO [10.237.72.168]) ([10.237.72.168]) by fmsmga005.fm.intel.com with ESMTP; 12 Jul 2018 05:52:49 -0700 Subject: Re: [PATCH v2 1/2] mmc: sdhci-esdhc-imx: disable clocks before changing frequency To: Stefan Agner , ulf.hansson@linaro.org Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org References: <20180712080725.14250-1-stefan@agner.ch> From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: Date: Thu, 12 Jul 2018 15:51:16 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.0 MIME-Version: 1.0 In-Reply-To: <20180712080725.14250-1-stefan@agner.ch> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/07/18 11:07, Stefan Agner wrote: > In the uSDHC case (e.g. i.MX 6) clocks only get disabled if frequency > is set to 0. However, it could be that the stack asks for a frequency > change while clocks are on. In that case the function clears the > divider registers (by clearing ESDHC_CLOCK_MASK) while the clock is > enabled! This causes a short period of time where the clock is > undivided (on a i.MX 6DL a clock of 196MHz has been measured). > > For older IP variants the driver disables clock by clearing some bits > in ESDHC_SYSTEM_CONTROL. > > Make sure to disable card clock before changing frequency for uSDHC > IP variants too. > > Signed-off-by: Stefan Agner Acked-by: Adrian Hunter > --- > drivers/mmc/host/sdhci-esdhc-imx.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c > index 85fd5a8b0b6d..acacd8481473 100644 > --- a/drivers/mmc/host/sdhci-esdhc-imx.c > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c > @@ -708,14 +708,14 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host, > int div = 1; > u32 temp, val; > > + if (esdhc_is_usdhc(imx_data)) { > + val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); > + writel(val & ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON, > + host->ioaddr + ESDHC_VENDOR_SPEC); > + } > + > if (clock == 0) { > host->mmc->actual_clock = 0; > - > - if (esdhc_is_usdhc(imx_data)) { > - val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); > - writel(val & ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON, > - host->ioaddr + ESDHC_VENDOR_SPEC); > - } > return; > } > >