Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp1686976imm; Thu, 12 Jul 2018 06:17:02 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdE8eUJK3Hnxrp9FdYzMQg/xarzDTw2ekUpd9ha8WFAFQeACS8UUisCqDa4W68Jl0tHb9A+ X-Received: by 2002:a17:902:9b82:: with SMTP id y2-v6mr2179611plp.69.1531401422204; Thu, 12 Jul 2018 06:17:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531401422; cv=none; d=google.com; s=arc-20160816; b=xwu+9TXgeVoNZKBSmKWSFWAogP5/uVrz061E4YZ69YgmkhoMrR0Ntl/YYwwtdZxoX/ NWinmsFM4rGEtYlmvwmzSPIJlO+twur5rYbgR6OtePqsIDF+aFux2NcCq9tD8ajK6lFw JqXo+zP/E2GjsCegV2RxJGwItzZN2JaZvM3C6i/5NsFHPDm4q3GarkheTpRPEA7FjudB Dryv0DDAdA2legcPF+BbQeEOCucpDQddltX7wscwVQU6CSMnsCsS1iWMz/+EAZFclP5g WOCvXz4396iZbBncoqBvIEk6it5X895zBiwc1t1S+NHC+ki6C41Oq97mxaFuRzCj5XlY 5bkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=z5L5XcaJHi74qDHdcxdLkAYEV32EMWitp2AVEs6Y/uU=; b=eY7Tg+B8JDUzeNQEwA2GXJhAS1S9i0psVxBbnKl1k6kN7G9g8x1sugUTHxU6hoMl4n 2K+m8HSyvLVEJNv6h61LA5sqE9bvMX72G4YTOaSF9JvwI1IBUoeqaaRPGvoCFjezUCwv Lql17loDj3GT9WMbrxbYVnwJ6dSufh2sRw/hlrX7+wro3SBi/PLWW4QQMLpg+c8PYZmb LYRoSA6FWx+LnJL0DuZybPYJ88S53sR282ZwtUkpkJ8FHt0uxY5KlBvnRU3DqNm2PK+X D6T0CqMXyRxILRKZ/ksM51MnDpSCx6V01hl0bCihm8tNq9gur/JtmWFVFCE2yQz/7mnG +S6A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b9-v6si4701470pfi.99.2018.07.12.06.16.46; Thu, 12 Jul 2018 06:17:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729331AbeGLNZf (ORCPT + 99 others); Thu, 12 Jul 2018 09:25:35 -0400 Received: from mail-sh2.amlogic.com ([58.32.228.45]:32951 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726760AbeGLNZf (ORCPT ); Thu, 12 Jul 2018 09:25:35 -0400 Received: from localhost.localdomain (10.18.20.250) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Thu, 12 Jul 2018 21:15:17 +0800 From: Yixun Lan To: Jerome Brunet , Neil Armstrong CC: Yixun Lan , Kevin Hilman , Carlo Caione , Michael Turquette , Stephen Boyd , Rob Herring , Miquel Raynal , Boris Brezillon , Martin Blumenstingl , Liang Yang , Qiufang Dai , Jian Hu , , , , , Subject: [PATCH v3 0/2] clk: meson: add a sub EMMC clock controller support Date: Thu, 12 Jul 2018 21:12:42 +0000 Message-ID: <20180712211244.11428-1-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.18.20.250] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This driver will add a MMC clock controller driver support. The original idea about adding a clock controller is during the discussion in the NAND driver mainline effort[1]. I've tested this in the S400 board (AXG platform) by using NAND driver. Changes since v2 [3]: - squash dt-binding clock-id patch - update license - fix alignment - construct a clk register helper() function Changes since v1 [2]: - implement phase clock - update compatible name - adjust file name - divider probe() into small functions, and re-use them [1] https://lkml.kernel.org/r/20180628090034.0637a062@xps13 [2] https://lkml.kernel.org/r/20180703145716.31860-1-yixun.lan@amlogic.com [3] https://lkml.kernel.org/r/20180710163658.6175-1-yixun.lan@amlogic.com Yixun Lan (2): clk: meson: add DT documentation for emmc clock controller clk: meson: add sub MMC clock controller driver .../bindings/clock/amlogic,mmc-clkc.txt | 31 ++ drivers/clk/meson/Kconfig | 9 + drivers/clk/meson/Makefile | 1 + drivers/clk/meson/mmc-clkc.c | 367 ++++++++++++++++++ .../clock/amlogic,meson-mmc-clkc.h | 16 + 5 files changed, 424 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt create mode 100644 drivers/clk/meson/mmc-clkc.c create mode 100644 include/dt-bindings/clock/amlogic,meson-mmc-clkc.h -- 2.18.0