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[209.132.180.67]) by mx.google.com with ESMTP id e36-v6si22101005pge.507.2018.07.12.18.49.05; Thu, 12 Jul 2018 18:49:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387994AbeGMCAr (ORCPT + 99 others); Thu, 12 Jul 2018 22:00:47 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:9229 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2387956AbeGMCAr (ORCPT ); Thu, 12 Jul 2018 22:00:47 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 26C91F327B296; Fri, 13 Jul 2018 09:48:16 +0800 (CST) Received: from [127.0.0.1] (10.177.23.164) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.382.0; Fri, 13 Jul 2018 09:48:07 +0800 Subject: Re: [PATCH 1/1] iommu/arm-smmu-v3: prevent any devices access to memory without registration To: Will Deacon References: <1531387723-3592-1-git-send-email-thunder.leizhen@huawei.com> <20180712170120.GC26935@arm.com> CC: Jean-Philippe Brucker , Robin Murphy , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel , "guohanjun (Hanjun Guo)" From: "Leizhen (ThunderTown)" Message-ID: <5B4804D6.4050508@huawei.com> Date: Fri, 13 Jul 2018 09:48:06 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <20180712170120.GC26935@arm.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018/7/13 1:01, Will Deacon wrote: > On Thu, Jul 12, 2018 at 05:28:43PM +0800, Zhen Lei wrote: >> Stream bypass is not security. A malicious device can be hot plugged >> without match any drivers, but it can access to any memory. So change to >> disable bypass by default. >> >> Signed-off-by: Zhen Lei >> --- >> drivers/iommu/arm-smmu-v3.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) > > Whilst this sounds nice, I *bet* you it will break some systems. In > particular, those where the SMMU is described but the toplogical information > is either incorrect or incomplete. Suppose this scene exists, maybe we should consider updating IORT specification, to indicate whether a smmu treats all unregistered devices as stream bypass or not, --- global control to indicate whether a single device default use stream bypass or not, --- local control that will be more flexible. But we still disable bypass by default. > > I guess we could put it into next and see if anybody complains. What do > others think? > > Will > >> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c >> index 1d64710..b0ec28d 100644 >> --- a/drivers/iommu/arm-smmu-v3.c >> +++ b/drivers/iommu/arm-smmu-v3.c >> @@ -366,7 +366,7 @@ >> #define MSI_IOVA_BASE 0x8000000 >> #define MSI_IOVA_LENGTH 0x100000 >> >> -static bool disable_bypass; >> +static bool disable_bypass = 1; >> module_param_named(disable_bypass, disable_bypass, bool, S_IRUGO); >> MODULE_PARM_DESC(disable_bypass, >> "Disable bypass streams such that incoming transactions from devices that are not attached to an iommu domain will report an abort back to the device and will not be allowed to pass through the SMMU."); >> -- >> 1.8.3 >> >> > > . > -- Thanks! BestRegards