Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp749999imm; Fri, 13 Jul 2018 05:51:11 -0700 (PDT) X-Google-Smtp-Source: AAOMgpeycZceHQ0aYEy6wok8aw95nlKhuJT++Th5Cez0mTvXq0TJFF4r/4h97xPa/Wtz00dq5stx X-Received: by 2002:a63:3f05:: with SMTP id m5-v6mr5905207pga.51.1531486271539; Fri, 13 Jul 2018 05:51:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531486271; cv=none; d=google.com; s=arc-20160816; b=zHzSLbasZdNlEmBrWYwoOBAmqDlSYyYTbObCnGyflhd3r65lbPSx8BestWFDMaK3al eSC7mW06pcDj6bYrBIMW2jQyI5GRj32CwRv8AE473KmhzSjDRFNxNS6rejojPOvVR5sP 1g45Sybs1Bdo2JmiujIdHpKx7eXh5N5kMSO6RKelcpRHila+ZKfdPtAZNmMMXMw/vB1H S9u3iD9WgRTgwTXpYoRb1ufoplBnRgwEZdqcedYz0bj9RDp7a5VuLC4zxaBQMvbAlSrB xBpbfpbk5HpMcj49O8bJLlUneOEOztykFWhwNwJM7yiiDekkcfhsVifinO2m3HINxV0a E4FA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=xx6a/yWnHNVFkP+h5TPhZgx7JQiB7UQGs+5DBjgoSjo=; b=cxzTlX+3rlXmFtpwzpYdddlmy2XWQGZ8oTVCxNG1DHp6APIvP6NSQKlQpRlANghGTy Oshr4GDb8MuMTs0P89TWV3h0Jjsn81ms2FX1karOsGwCA56pfoLXRuwgt2DjKw9YfPiq Tw6amu+247mmKwblPn7KZ6DW+2FOi2+VNDG3mi9C2AJKu6R8Q/765hB6fAZb6At8eXuj FEQBlenDX2gfVXHpW0NNA2i04CGmDC1jb+/V1638vHvoc5LAJv63czFEkErKy0ctylFz JH8KUZ1TNpF4Xm3oCXgkpQqgvkMKKNNXT0evaUerGtvJaM5ikuu4JFJrIhI0jkku0Dfm aHxg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s65-v6si22754882pgb.486.2018.07.13.05.50.56; Fri, 13 Jul 2018 05:51:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729830AbeGMNEv (ORCPT + 99 others); Fri, 13 Jul 2018 09:04:51 -0400 Received: from metis.ext.pengutronix.de ([85.220.165.71]:54559 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729778AbeGMNEu (ORCPT ); Fri, 13 Jul 2018 09:04:50 -0400 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1fdxWW-0003em-TE; Fri, 13 Jul 2018 14:50:12 +0200 Received: from mfe by dude.hi.pengutronix.de with local (Exim 4.91) (envelope-from ) id 1fdxWW-0007t2-I3; Fri, 13 Jul 2018 14:50:12 +0200 From: Marco Felsch To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: fabio.estevam@nxp.com, Anson.Huang@nxp.com, kernel@pengutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] regulator: pfuze100: add support to en-/disable switch regulators Date: Fri, 13 Jul 2018 14:50:02 +0200 Message-Id: <20180713125002.24331-3-m.felsch@pengutronix.de> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180713125002.24331-1-m.felsch@pengutronix.de> References: <20180713125002.24331-1-m.felsch@pengutronix.de> X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: mfe@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add enable/disable support for switch regulators on pfuze100. Based on commit 5fe156f1cab4 ("regulator: pfuze100: add enable/disable for switch") which is reverted due to boot regressions by commit 464a5686e6c9 ("regulator: Revert "regulator: pfuze100: add enable/disable for switch""). Disabling the switch regulators will only be done if the user specifies "fsl,pfuze-support-disable" in its device tree to keep backward compatibility with current dtb's [1]. [1] https://patchwork.kernel.org/patch/10490381/ Signed-off-by: Marco Felsch --- Changes in v2: - Don't trick the framework, use a seperate ops struct to register the correct callbacks. - Set the desc en/disable_val and enable_time only if it necessary - Change the dt property binding Changes since https://patchwork.kernel.org/patch/10405723/ - Use DT property to keep backward compatibility - Use the default register val 0x8 as enable_val drivers/regulator/pfuze100-regulator.c | 36 ++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c index cde6eda1d283..b70d16d5a2ff 100644 --- a/drivers/regulator/pfuze100-regulator.c +++ b/drivers/regulator/pfuze100-regulator.c @@ -17,6 +17,8 @@ #include #include +#define PFUZE_FLAG_DISABLE_SW BIT(1) + #define PFUZE_NUMREGS 128 #define PFUZE100_VOL_OFFSET 0 #define PFUZE100_STANDBY_OFFSET 1 @@ -50,10 +52,12 @@ struct pfuze_regulator { struct regulator_desc desc; unsigned char stby_reg; unsigned char stby_mask; + bool sw_reg; }; struct pfuze_chip { int chip_id; + int flags; struct regmap *regmap; struct device *dev; struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR]; @@ -170,6 +174,17 @@ static const struct regulator_ops pfuze100_sw_regulator_ops = { .set_ramp_delay = pfuze100_set_ramp_delay, }; +static const struct regulator_ops pfuze100_sw_disable_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = pfuze100_set_ramp_delay, +}; + static const struct regulator_ops pfuze100_swb_regulator_ops = { .enable = regulator_enable_regmap, .disable = regulator_disable_regmap, @@ -209,9 +224,12 @@ static const struct regulator_ops pfuze100_swb_regulator_ops = { .uV_step = (step), \ .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \ .vsel_mask = 0x3f, \ + .enable_reg = (base) + PFUZE100_MODE_OFFSET, \ + .enable_mask = 0xf, \ }, \ .stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \ .stby_mask = 0x3f, \ + .sw_reg = true, \ } #define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages) \ @@ -471,6 +489,9 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) if (!np) return -EINVAL; + if (of_property_read_bool(np, "fsl,pfuze-support-disable")) + chip->flags |= PFUZE_FLAG_DISABLE_SW; + parent = of_get_child_by_name(np, "regulators"); if (!parent) { dev_err(dev, "regulators node not found\n"); @@ -703,6 +724,21 @@ static int pfuze100_regulator_probe(struct i2c_client *client, } } + /* + * Allow SW regulators to turn off. Checking it trough a flag is + * a workaround to keep the backward compatibility with existing + * old dtb's which may relay on the fact that we didn't disable + * the switched regulator till yet. + */ + if (pfuze_chip->flags & PFUZE_FLAG_DISABLE_SW) { + if (pfuze_chip->regulator_descs[i].sw_reg) { + desc->ops = &pfuze100_sw_disable_regulator_ops; + desc->enable_val = 0x8; + desc->disable_val = 0x0; + desc->enable_time = 500; + } + } + config.dev = &client->dev; config.init_data = init_data; config.driver_data = pfuze_chip; -- 2.18.0