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[209.132.180.67]) by mx.google.com with ESMTP id r87-v6si30355048pfj.331.2018.07.15.05.32.31; Sun, 15 Jul 2018 05:32:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=MaKTBWzv; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727003AbeGOMyr (ORCPT + 99 others); Sun, 15 Jul 2018 08:54:47 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:44740 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726235AbeGOMyq (ORCPT ); Sun, 15 Jul 2018 08:54:46 -0400 Received: by mail-wr1-f67.google.com with SMTP id r16-v6so29207143wrt.11; Sun, 15 Jul 2018 05:31:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=abDJQ6owpwoujitNLOqWSS193V5K8f5lBLMm4tSQJak=; b=MaKTBWzvoD/QpNSmzOWQE58BdPpyLCXwLB5+1IuSfkl4b20mS2F/39QbYcUa0ckPeI q3JyGWnQB+YrkdsmIcB9nUDeATePIItOfSm/AuFanwaBQacl9bzsYJ4f99d74ybVdoyS gP76Q4fkURNiYDoZSLgdlkYvbLNfSsh48Min0qqsGjMCFj2tiX9g9UxOy1kUVGopPcwb kpMbFtZZnjq9U6Q+LhnfKGt0lc9tXb3OZPMsBUG+1rIbuA4ZT8kuEWfBUFC1urrhk/JU p1YrJcDRhGbMclyFOFagJuBqV0VXfm2qrbjGkvmVvE6uTIN55aI0mp8/5Zy63jxGX3/I 02ew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=abDJQ6owpwoujitNLOqWSS193V5K8f5lBLMm4tSQJak=; b=I1uyVI18MlrQiytJJackrsrEZmKGp3knk+dbgPty9YlEgc7qH1faMaRjsqF3KN92Sy jScKAEv6pWE9HRVeD4IcqP0zIzr+lu/FgzeQ5uHP8UPp3cWZTxjqs+KE777XIuBmQnXA +C7aF28crUHzhtVPgUJpW0ApZh/mX3KcyzhEMElpNiihx1RUJ1wPsPhrFqpm39C8VxWi 41GY/vc7St7RXkoZ0Z9Hne0vCiFJdiff6RffiSofmUsKhCDnz4VK0AxNsO616yTBRHr+ 2gZGrGxbDdZrRdrqZ+b1o0xO0qjslPXgVaalARL5POhC33LK3FYK7+xLqpdry1pqpmz9 Ew2g== X-Gm-Message-State: AOUpUlElSX/q0Simlf3Ue6M1EAoaS3lDpDTkoBOd2oKJ/8RaxrhxCKIm XCiFfXuxX9MOeT0JRJOSy5o= X-Received: by 2002:adf:81a3:: with SMTP id 32-v6mr10298223wra.9.1531657916195; Sun, 15 Jul 2018 05:31:56 -0700 (PDT) Received: from parthiban.fritz.box ([62.91.12.240]) by smtp.gmail.com with ESMTPSA id s10-v6sm16358688wmb.12.2018.07.15.05.31.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 15 Jul 2018 05:31:55 -0700 (PDT) From: Saravanan Sekar To: afaerber@suse.de, manivannan.sadhasivam@linaro.org, sboyd@kernel.org Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux@cubietech.com, sravanhome@gmail.com, support@cubietech.com, catalin.marinas@arm.com, mturquette@baylibre.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, thomas.liau@actions-semi.com, darren@cubietech.com, robh+dt@kernel.org, jeff.chen@actions-semi.com, pn@denx.de, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mp-cs@actions-semi.com Subject: [PATCH v4 5/5] arm64: dts: actions: Set UART clock reference from CMU Date: Sun, 15 Jul 2018 14:31:45 +0200 Message-Id: <20180715123145.16975-6-sravanhome@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180715123145.16975-1-sravanhome@gmail.com> References: <20180715123145.16975-1-sravanhome@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Parthiban Nallathambi Signed-off-by: Saravanan Sekar --- arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts index ef79d7905f44..388a5d8bb48d 100644 --- a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts +++ b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts @@ -28,12 +28,6 @@ device_type = "memory"; reg = <0x1 0xe0000000 0x0 0x0>; }; - - uart3_clk: uart3-clk { - compatible = "fixed-clock"; - clock-frequency = <921600>; - #clock-cells = <0>; - }; }; &timer { @@ -42,5 +36,5 @@ &uart3 { status = "okay"; - clocks = <&uart3_clk>; + clocks = <&clock CLK_UART3>; }; -- 2.18.0