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From:   Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
To:     Dan Williams <dan.j.williams@intel.com>
CC:     "linux-nvdimm@lists.01.org" <linux-nvdimm@lists.01.org>,
        Michal Hocko <mhocko@suse.com>, "hch@lst.de" <hch@lst.de>,
        "linux-fsdevel@vger.kernel.org" <linux-fsdevel@vger.kernel.org>,
        "linux-mm@kvack.org" <linux-mm@kvack.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 07/13] mm, madvise_inject_error: Let memory_failure()
 optionally take a page reference
Thread-Topic: [PATCH v6 07/13] mm, madvise_inject_error: Let
 memory_failure() optionally take a page reference
Thread-Index: AQHUGy+MPceVQOK8wkK6AOOqXfBixqSSaBaA
Date:   Tue, 17 Jul 2018 06:52:03 +0000
Message-ID: <20180717065203.GA28797@hori1.linux.bs1.fc.nec.co.jp>
References: <153154376846.34503.15480221419473501643.stgit@dwillia2-desk3.amr.corp.intel.com>
 <153154380652.34503.2174920161570183766.stgit@dwillia2-desk3.amr.corp.intel.com>
In-Reply-To: <153154380652.34503.2174920161570183766.stgit@dwillia2-desk3.amr.corp.intel.com>
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On Fri, Jul 13, 2018 at 09:50:06PM -0700, Dan Williams wrote:
> The madvise_inject_error() routine uses get_user_pages() to lookup the
> pfn and other information for injected error, but it does not release
> that pin. The assumption is that failed pages should be taken out of
> circulation.
> 
> However, for dax mappings it is not possible to take pages out of
> circulation since they are 1:1 physically mapped as filesystem blocks,
> or device-dax capacity. They also typically represent persistent memory
> which has an error clearing capability.
> 
> In preparation for adding a special handler for dax mappings, shift the
> responsibility of taking the page reference to memory_failure(). I.e.
> drop the page reference and do not specify MF_COUNT_INCREASED to
> memory_failure().
> 
> Cc: Michal Hocko <mhocko@suse.com>
> Cc: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>

Acked-by: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>