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[209.132.180.67]) by mx.google.com with ESMTP id 65-v6si981982pld.451.2018.07.17.07.15.13; Tue, 17 Jul 2018 07:15:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FEAft6nE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731765AbeGQOr3 (ORCPT + 99 others); Tue, 17 Jul 2018 10:47:29 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:37061 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731691AbeGQOr2 (ORCPT ); Tue, 17 Jul 2018 10:47:28 -0400 Received: by mail-pg1-f194.google.com with SMTP id n7-v6so505626pgq.4 for ; Tue, 17 Jul 2018 07:14:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=GHEpIVcvpNWb+XRQNq9F7cibEI4qpG0+r8Jzf3ypt0s=; b=FEAft6nEC9KV1t/0KBSAlCHCysLC58/tOqokAfU+w7LahPksKGIOFuW4gOBDpRvvrS 2dZFYYpRtcan+J7GOmwqVPHqLzb4Ue5fQShtiwEelR9W7hYeBKKja9iLG+Sbzy+n2w6Z PttzF1Uu0w/x56f9nGvEZ4S0Z5gxDSxrnkuGs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=GHEpIVcvpNWb+XRQNq9F7cibEI4qpG0+r8Jzf3ypt0s=; b=qJ1pzLJpb1M9XUeogOuGPfD+3Y9P7lS2h61mfPL/upWqwSs+Wwk/yQkWeKeaAEF7Mm 6sG1FAUxYreFlvj7Dr27ips1pOUCakHHVqKLjq+7oXB8/zYZy5laFpm/I9w6ZIVqaMUB 30ernKlzeIsanSZ0fZZxGrKZ760k4IYC8w8xfaANlrReUHAjRVL3D7f+vYuzX06QThCo tL38kIyHqR/mU6L9//P+OLIf+bnRP4Gx+7HGz2fKMMhhEsH8IvYSibmQlmIWsppoZSx3 V5QIvj+5//5A2qWRH24xdYzLXQcvkEqJDpN29adsE53YsUDB6+u1Szw8+7Fw9oQ5SxOa PPSw== X-Gm-Message-State: AOUpUlFCdslXRdBP79YU7nAmnw+n0UJ2lrjz9C7/aOeTx7c/xgPaef5a 36PP+ziySnfmf0SWve4bP//A X-Received: by 2002:a63:5a13:: with SMTP id o19-v6mr1733446pgb.195.1531836877034; Tue, 17 Jul 2018 07:14:37 -0700 (PDT) Received: from mani ([103.59.133.81]) by smtp.gmail.com with ESMTPSA id p5-v6sm1945634pfn.57.2018.07.17.07.14.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Jul 2018 07:14:36 -0700 (PDT) Date: Tue, 17 Jul 2018 19:44:29 +0530 From: Manivannan Sadhasivam To: Saravanan Sekar Cc: afaerber@suse.de, sboyd@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linux@cubietech.com, support@cubietech.com, catalin.marinas@arm.com, mturquette@baylibre.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, thomas.liau@actions-semi.com, darren@cubietech.com, robh+dt@kernel.org, jeff.chen@actions-semi.com, pn@denx.de, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mp-cs@actions-semi.com Subject: Re: [PATCH v6 4/5] arm64: dts: actions: Add Clock Management Unit for S700 Message-ID: <20180717141429.GC19076@mani> References: <20180715203524.11948-1-sravanhome@gmail.com> <20180715203524.11948-5-sravanhome@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180715203524.11948-5-sravanhome@gmail.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Saravanan, On Sun, Jul 15, 2018 at 10:35:23PM +0200, Saravanan Sekar wrote: > Add Clock Management Unit for Actions Semi S700 SoC. > > Signed-off-by: Parthiban Nallathambi > Signed-off-by: Saravanan Sekar > --- > arch/arm64/boot/dts/actions/s700.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi > index 66dd5309f0a2..4497741d48b2 100644 > --- a/arch/arm64/boot/dts/actions/s700.dtsi > +++ b/arch/arm64/boot/dts/actions/s700.dtsi > @@ -4,6 +4,7 @@ > */ > > #include > +#include > > / { > compatible = "actions,s700"; > @@ -44,6 +45,13 @@ > }; > }; > > + cmu: clock-controller@e0168000 { > + compatible = "actions,s700-cmu"; > + reg = <0x0 0xe0168000 0x0 0x1000>; > + clocks = <&hosc>, <&losc>; > + #clock-cells = <1>; > + }; > + CMU node should come under soc, ordered based on the address. Thanks, Mani > reserved-memory { > #address-cells = <2>; > #size-cells = <2>; > @@ -87,6 +95,12 @@ > #clock-cells = <0>; > }; > > + losc: losc { > + compatible = "fixed-clock"; > + clock-frequency = <32768>; > + #clock-cells = <0>; > + }; > + > soc { > compatible = "simple-bus"; > #address-cells = <2>; > -- > 2.18.0 >