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[209.132.180.67]) by mx.google.com with ESMTP id 62-v6si1081381pfg.224.2018.07.17.07.48.04; Tue, 17 Jul 2018 07:48:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731872AbeGQPUW (ORCPT + 99 others); Tue, 17 Jul 2018 11:20:22 -0400 Received: from mga17.intel.com ([192.55.52.151]:7628 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729727AbeGQPUV (ORCPT ); Tue, 17 Jul 2018 11:20:21 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Jul 2018 07:47:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,365,1526367600"; d="scan'208";a="72095419" Received: from smile.fi.intel.com (HELO smile) ([10.237.72.86]) by fmsmga004.fm.intel.com with ESMTP; 17 Jul 2018 07:47:19 -0700 Message-ID: Subject: Re: [PATCH 2/2] i2c: designware: Add support for a bus clock From: Andy Shevchenko To: Phil Edworthy , Simon Horman Cc: Jarkko Nikula , Geert Uytterhoeven , "linux-i2c@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" , Mika Westerberg Date: Tue, 17 Jul 2018 17:47:19 +0300 In-Reply-To: References: <1531731553-22979-1-git-send-email-phil.edworthy@renesas.com> <1531731553-22979-3-git-send-email-phil.edworthy@renesas.com> <20180717120737.bipotpki3yhn6klf@verge.net.au> <40f2729f38bd565a829d60d9cc8f508e33b0dc65.camel@linux.intel.com> Organization: Intel Finland Oy Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.1-2 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2018-07-17 at 14:40 +0000, Phil Edworthy wrote: > Hi Andy, > > On 17 July 2018 15:19, Andy Shevchenko wrote: > > On Tue, 2018-07-17 at 12:42 +0000, Phil Edworthy wrote: > > > > > > While your point sounds valid (don't remember how clk_get() is > > > > implemented), NULL is also OK to have. > > > > > > Ok as in there is no bus clock, right? > > > So it should be: > > > if (!IS_ERR_OR_NULL (dev->busclk)) > > > > Nope, NULL is no error case for optional clock. > > I must be missing something here... See how clk_prepare_enable() is implemented. > I agree that NULL for an optional clock is not an error. However, the > code above is now: > + if (prepare) { > + /* Optional bus clock */ > + if (!IS_ERR_OR_NULL(dev->busclk)) { Check for NULL is redundant. > + ret = clk_prepare_enable(dev->busclk); > + if (ret) > + return ret; > + } > + > return clk_prepare_enable(dev->clk); > + } > > So, if you have a valid busclk, it gets enabled, otherwise it is > left alone. -- Andy Shevchenko Intel Finland Oy