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[209.132.180.67]) by mx.google.com with ESMTP id u90-v6si2571501pfk.82.2018.07.17.23.18.27; Tue, 17 Jul 2018 23:18:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=NfwxTzeV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726955AbeGRGyG (ORCPT + 99 others); Wed, 18 Jul 2018 02:54:06 -0400 Received: from mail.kernel.org ([198.145.29.99]:33612 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726251AbeGRGyG (ORCPT ); Wed, 18 Jul 2018 02:54:06 -0400 Received: from mail-wm0-f50.google.com (mail-wm0-f50.google.com [74.125.82.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A677C20850; Wed, 18 Jul 2018 06:17:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1531894672; bh=dTkzOv+g7gnmCnjtc/aD4Sic0Oz+GgcatWQ7/GhmLqU=; h=In-Reply-To:References:From:Date:Subject:To:Cc:From; b=NfwxTzeVFSWRIaynZtofILittMnh0mdcHTO6qU119cWIWbQlV1AAXrjCREg/6GrVh x2hCGadVUu1/Gw+mfVCY1PJmfwSRVRnZFzvFGu71GPEnzXh+tYLCZCswv4F8WVpqtU dW5/Iar9Uf3/dZLoO7Jmw8NQIcfzKnUiozU8tmmA= Received: by mail-wm0-f50.google.com with SMTP id 69-v6so1532371wmf.3; Tue, 17 Jul 2018 23:17:52 -0700 (PDT) X-Gm-Message-State: AOUpUlGARvE9tc70aGpM06otO/TkNxtGiR82I8m3M7pEZUzGqs6PInxp uI/EWKtCxHgx9Wsdc86HsRrHKRHHD5tZssIX/Gw= X-Received: by 2002:a1c:9c56:: with SMTP id f83-v6mr612493wme.135.1531894671152; Tue, 17 Jul 2018 23:17:51 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:adf:9141:0:0:0:0:0 with HTTP; Tue, 17 Jul 2018 23:17:50 -0700 (PDT) In-Reply-To: References: <1531822342-4293-1-git-send-email-linux.amoon@gmail.com> From: Krzysztof Kozlowski Date: Wed, 18 Jul 2018 08:17:50 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/5] thermal: exynos: enable core tmu clk on exynos platform To: Anand Moon Cc: Bartlomiej Zolnierkiewicz , Zhang Rui , Eduardo Valentin , Kukjin Kim , Rob Herring , Mark Rutland , Linux PM list , "linux-samsung-soc@vger.kernel.org" , linux-arm-kernel , Linux Kernel , devicetree Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17 July 2018 at 22:23, Anand Moon wrote: > Hi Krzysztof > > On 17 July 2018 at 17:50, Krzysztof Kozlowski wrote: >> Hi Anand, >> >> Thanks for patch. >> >> On 17 July 2018 at 12:12, Anand Moon wrote: >>> clk_summary do not show tmu_apbif clk enable, so replace >>> the clk_prepare with clk_prepare_enables to enable tmu clk. >> >> This is not valid reason to do a change. What is clk_summary does not >> really matter. Your change has negative impact on power consumption as >> the clock stays enabled all the time. This is not what we want... so >> please explain it more - why you need the clock to be enabled all the >> time? What is broken (clk_summary is not broken in this case)? >> > > Opps I could not explain some more in my commit message. > > Actually TMU sensor for Exynos process are controlled by so external clk > > Exynos4412 have VDD18_TS sensor which controls the CLK_SENSE tmu. > Exynos5422 have VDD18_TS01 / VDD18_TS23 / VDD18_TS4 sensor which > control the CLK_SENSE tmu. > > So as per my understanding tmu is clk driver which control the flow PMIC. > > clk_prepare_enable combine clk_prepare and clk_enable > and clk_disable_unprepare combine clk_disable and clk_unprepare. > > most of the driver prefer clk_prepare_enable and clk_disable_unprepare. > > clk_summary is just a reference looking point where we could check the > clk is enable/disable. > > what is broken ? > I still few more parameter need to tuned to configure the tmu driver. I am sorry but I am still unable to see what is broken and what are you trying to fix. I asked what is broken and you replied that there is a sensor, there is a clock, drivers use clk_prepare_enable and some more parameter need to be tuned... None of these are answers to question - what is broken. How can I reproduce the problem? Best regards, Krzysztof