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[209.132.180.67]) by mx.google.com with ESMTP id j15-v6si5330083pgb.472.2018.07.18.23.24.21; Wed, 18 Jul 2018 23:24:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729215AbeGSHEu (ORCPT + 99 others); Thu, 19 Jul 2018 03:04:50 -0400 Received: from mail.bootlin.com ([62.4.15.54]:50959 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726931AbeGSHEu (ORCPT ); Thu, 19 Jul 2018 03:04:50 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 30F9420766; Thu, 19 Jul 2018 08:23:19 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon (unknown [91.160.177.164]) by mail.bootlin.com (Postfix) with ESMTPSA id B55722069C; Thu, 19 Jul 2018 08:23:18 +0200 (CEST) Date: Thu, 19 Jul 2018 08:23:18 +0200 From: Boris Brezillon To: Janusz Krzysztofik Cc: Miquel Raynal , Tony Lindgren , Aaro Koskinen , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , Linus Walleij , Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Artem Bityutskiy Subject: Re: [RFC PATCH 3/8] mtd: rawnand: ams-delta: Set port direction once per transfer Message-ID: <20180719082318.290abee1@bbrezillon> In-Reply-To: <20180718235710.18242-4-jmkrzyszt@gmail.com> References: <20180718235710.18242-1-jmkrzyszt@gmail.com> <20180718235710.18242-4-jmkrzyszt@gmail.com> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 19 Jul 2018 01:57:05 +0200 Janusz Krzysztofik wrote: > In its current shape, the driver sets data port direction before each > byte read/write operation, even during multi-byte transfers. Optimize > that by setting the port direction only on first byte of each transfer. Sounds like premature optimization for something you'll rework when fully switching to the GPIO consumer API to control the DATA bus. > > Signed-off-by: Janusz Krzysztofik > --- > drivers/mtd/nand/raw/ams-delta.c | 42 ++++++++++++++++++++++++++++++---------- > 1 file changed, 32 insertions(+), 10 deletions(-) > > diff --git a/drivers/mtd/nand/raw/ams-delta.c b/drivers/mtd/nand/raw/ams-delta.c > index 6ac38e9cfa1a..dfefcd79b420 100644 > --- a/drivers/mtd/nand/raw/ams-delta.c > +++ b/drivers/mtd/nand/raw/ams-delta.c > @@ -72,50 +72,72 @@ static const struct mtd_partition partition_info[] = { > .size = 3 * SZ_256K }, > }; > > -static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) > +static void ams_delta_write_next_byte(struct mtd_info *mtd, u_char byte) > { > struct nand_chip *this = mtd_to_nand(mtd); > struct ams_delta_nand *priv = nand_get_controller_data(this); > - void __iomem *io_base = priv->io_base; > > - writew(0, io_base + OMAP_MPUIO_IO_CNTL); > writew(byte, this->IO_ADDR_W); > gpiod_set_value(priv->gpiod_nwe, 0); > ndelay(40); > gpiod_set_value(priv->gpiod_nwe, 1); > } > > -static u_char ams_delta_read_byte(struct mtd_info *mtd) > +static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) > { > - u_char res; > struct nand_chip *this = mtd_to_nand(mtd); > struct ams_delta_nand *priv = nand_get_controller_data(this); > void __iomem *io_base = priv->io_base; > > + writew(0, io_base + OMAP_MPUIO_IO_CNTL); > + > + ams_delta_write_next_byte(mtd, byte); > +} > + > +static u_char ams_delta_read_next_byte(struct mtd_info *mtd) > +{ > + struct nand_chip *this = mtd_to_nand(mtd); > + struct ams_delta_nand *priv = nand_get_controller_data(this); > + u_char res; > + > gpiod_set_value(priv->gpiod_nre, 0); > ndelay(40); > - writew(~0, io_base + OMAP_MPUIO_IO_CNTL); > res = readw(this->IO_ADDR_R); > gpiod_set_value(priv->gpiod_nre, 1); > > return res; > } > > +static u_char ams_delta_read_byte(struct mtd_info *mtd) > +{ > + struct nand_chip *this = mtd_to_nand(mtd); > + struct ams_delta_nand *priv = nand_get_controller_data(this); > + void __iomem *io_base = priv->io_base; > + > + writew(~0, io_base + OMAP_MPUIO_IO_CNTL); > + > + return ams_delta_read_next_byte(mtd); > +} > + > static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf, > int len) > { > int i; > > - for (i=0; i - ams_delta_write_byte(mtd, buf[i]); > + if (len > 0) > + ams_delta_write_byte(mtd, buf[0]); > + for (i = 1; i < len; i++) > + ams_delta_write_next_byte(mtd, buf[i]); > } > > static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len) > { > int i; > > - for (i=0; i - buf[i] = ams_delta_read_byte(mtd); > + if (len > 0) > + buf[0] = ams_delta_read_byte(mtd); > + for (i = 1; i < len; i++) > + buf[i] = ams_delta_read_next_byte(mtd); > } > > /*