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[98.195.139.126]) by smtp.gmail.com with ESMTPSA id c5-v6sm3066835itj.9.2018.07.19.08.55.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Jul 2018 08:55:07 -0700 (PDT) Subject: Re: [PATCH] PCI/AER: Do not clear AER bits if we don't own AER To: Sinan Kaya , bhelgaas@google.com, keith.busch@intel.com Cc: alex_gagniuc@dellteam.com, austin_bolen@dell.com, shyam_iyer@dell.com, Frederick Lawler , Oza Pawandeep , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org References: <20180717153135.25925-1-mr.nuke.me@gmail.com> <494a5df8-0987-3a6c-30a4-a3c9ef4ed1f3@kernel.org> From: "Alex G." Message-ID: <37509c44-64fe-4140-c776-53c3346cbfe5@gmail.com> Date: Thu, 19 Jul 2018 10:55:06 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <494a5df8-0987-3a6c-30a4-a3c9ef4ed1f3@kernel.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/17/2018 10:41 AM, Sinan Kaya wrote: > > On 7/17/2018 8:31 AM, Alexandru Gagniuc wrote: >> +    if (pcie_aer_get_firmware_first(dev)) >> +        return -EIO; > > Can you move this to closer to the caller pci_aer_init()? I could move it there. although pci_cleanup_aer_error_status_regs() is called directly from pci_restore_state. Of course, aer_cap should be zero in this case, and we'd still bail out. I find the intent clearer if we check it here rather than having to do the mental parsing of the state of aer_cap. Alex