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a=rsa-sha256; c=relaxed/relaxed; d=axentia.se; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zNg6I6FFoJQRdAuONFTdu9V1kpNuglYGohg3lRSw8ug=; b=s5J5nd2D+yn7T+8htN7tsacKG+XIVpcSyzMnyqFt4NNU8QdMwq7feGewZwopU28DpRGNZVugKQOb7nmFjkbsNhIs5o7rVX6ByjApv80TgMyA59wdnZg16EzSNMrxLvRqkV5UslMMrCK6ugKw+ATmpqlUvs+HtDaUJIBQlHPvNRI= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=peda@axentia.se; Received: from [192.168.13.3] (85.226.244.23) by HE1PR0201MB2459.eurprd02.prod.outlook.com (2603:10a6:3:82::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.973.16; Fri, 20 Jul 2018 09:58:05 +0000 Subject: Re: [PATCH v6 00/10] Add the I3C subsystem To: Arnd Bergmann , Boris Brezillon Cc: Wolfram Sang , linux-i2c@vger.kernel.org, Jonathan Corbet , "open list:DOCUMENTATION" , Greg Kroah-Hartman , Przemyslaw Sroka , Arkadiusz Golec , Alan Douglas , Bartosz Folta , Damian Kos , Alicja Jurasik-Urbaniak , Cyprian Wronka , Suresh Punnoose , Rafal Ciepiela , Thomas Petazzoni , Nishanth Menon , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , DTML , Linux Kernel Mailing List , Vitor Soares , Geert Uytterhoeven , Linus Walleij , Xiang Lin , linux-gpio@vger.kernel.org, Sekhar Nori , Przemyslaw Gaj References: <20180719152930.3715-1-boris.brezillon@bootlin.com> From: Peter Rosin Organization: Axentia Technologies AB Message-ID: <2ab0ab75-2df0-2714-f007-c33b25481016@axentia.se> Date: Fri, 20 Jul 2018 11:57:56 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; 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The reason is that I want to be able >> to handle multiple master connected to the same bus and visible to >> Linux. >> In this situation, we should only have one instance of the device and >> not one per master, and sharing the bus object would be part of the >> solution to gracefully handle this case. >> I'm not sure if we will ever need to deal with multiple masters >> controlling the same bus and exposed under Linux, but separating the >> bus and master concept is pretty easy, hence the decision to do it >> now, just in case we need it some day. >> The other benefit of separating the bus and master concepts is that >> master devices appear under the bus directory in sysfs. >> >> Discussion around the bus/master/dev representation is still ongoing, >> with Arnd opting for a simple approach where >> * the bus is implicitly represented by the master device >> * the master is not represented as a device under the I3C bus >> * only remote I3C devices are exposed and possibly duplicated if >> several masters controlling the same bus are exposed to the same >> Linux instance >> and Peter preferring the representation where the bus is a separate >> object. IIRC, Wolfram was in favor of the "bus is a separate object" >> too. >> >> If possible, I'd like to close this discussion soon, no matter which >> solution is chosen. > ... >> Missing features in this preliminary version: > ... >> - no support for multi-master and the associated concepts (mastership >> handover, support for secondary masters, ...) > > Let's try to come to a conclusion to this discussion, this is the main > show-stopper for inclusion that I see, as changing the fundamental > design would be hard to do once we do it one way or the other, > and the structure is exposed to user space. > > Peter and Wolfram, could you explain what scenario you can see that > would require handing over ownership of a device from one i3c master > to another i3c master when both are controlled by the same Linux > instance? > > To me this seems like a rather odd scenario, and supporting it > properly requires significant complexity once we try to support the > dynamic handover of the bus between two of our own masters. > > It seems more likely to me that we could deal with this case by > requiring either that each bus is controlled by at most one master > device in Linux, or at least that when we have two masters on > the same bus that they each control a non-overlapping set of > slave devices. Either way we'd be able to represent the structure > as a normal tree in the firmware (DT or ACPI) as well as in > sysfs. I have not read much of the I3C spec. I'm just coming from the current situation with I2C and the i2c-demux-pinctrl driver which tries to retrofit this into the I2C world and is not doing a grand job. And how could it? If you can acknowledge that i2c-demux-pinctrl is needed for I2C but for some reason is not needed for I3C because of something that differs between I2C and I3C, then fine, by all means ditch the explicit bus object. But in my mind splitting up the devices on the same bus between several of our own masters and then not have a single object for the bus is going to cause headaches down the line. Be it address clashes or trouble with master ping-pong or whatever. I think the reason for i2c-demux-pinctrl is that some (most?) I2C hardware suffers from quirks and one way to work around it is to make selected accesses from a different master. I expect I3C HW to also suffer from quirks... Maybe a bit-bang I3C master isn't feasible for some fundamental reason? But if it is, then I'd say that it's just a matter of time until someone finds a situation where such a thing could be used to work around some I3C quirk. And then it might be too expensive to always use the bit-bang master for the affected device. But what do I know? Don't let me hold this series back... Cheers, Peter