Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp2727857imm; Fri, 20 Jul 2018 04:00:35 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdhjoOi7g/lapBgqXpbMctOgwbvHY4cnHrqj9wawqUWjVQ3eZ5EgjYGZbAyoy8y7oUs56n5 X-Received: by 2002:a63:2644:: with SMTP id m65-v6mr1575518pgm.371.1532084435821; Fri, 20 Jul 2018 04:00:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532084435; cv=none; d=google.com; s=arc-20160816; b=A5xzj7UiTDYzVzNkj+i+OR415ICiYkhCiphIhSdj9dAPGkrtZq/dxdyUuznBu7D9sk TtWP0y+xTlylT2xitpV/hltizyU9sqXiIfQTskVfxn4uST994mkkjzQOOkNn57QfrI+g SYO3UWV6nx59IH/6Lb3vJ10yueaV/Swuy0CaeADE4NLEkuf+fZs4WmwLfEsbLKyUFjkQ ksuXsw8VyN3mu7ORbxCuAEO3PDtSXk2Yrh41HvLtOSdTDhKgFtW9vFlaqkcz+lKOMCi4 ZLNSXFznX+06iqXu9sojynreHCPz/twNn/7jxGmPnsSMdOB1g/a14vr6tK1xXAJeSlJY wU1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=7IfOuxhi4QgDG8X6CatpEkyF5pkbOOrVGAZ7dTYRV98=; b=U/DvAY4A73X/goZiF6xW+Z3wR0rKpRn6Oriry4BnxkRM3M9rhRu2KB33VkobUb1ZFo blJ3F+5eSgRNK1mvMZ71CfFISRIAuGMZBwRnODAFf4riHMZlLYHJ5Xxwh8pvezJo2Fvw e83wlUgiFdphHM8qhJ+VMQA2IRrDTr4wkmiwueNaeB06rduulcfDT4tHiUn2386r4nJ0 VcFSEV1bbreh9KwIS7fKgIBuxRdBnNzu7foiOmcbZOj5VM/Og5q7tWWqoGKh4r7Iqv// giemWjjY08Qz4d1cY+1vrMuQB+257E6M5Z+ZQCLFjKKzwsLw31xzhsbtnUj7F39nQfZe AbZw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a4-v6si1590933pgl.9.2018.07.20.04.00.21; Fri, 20 Jul 2018 04:00:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731334AbeGTLrT (ORCPT + 99 others); Fri, 20 Jul 2018 07:47:19 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:19839 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731034AbeGTLrS (ORCPT ); Fri, 20 Jul 2018 07:47:18 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1, AES128-SHA) id ; Fri, 20 Jul 2018 03:59:43 -0700 Received: from HQMAIL106.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 20 Jul 2018 03:59:36 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 20 Jul 2018 03:59:36 -0700 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 20 Jul 2018 10:59:35 +0000 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 20 Jul 2018 10:59:35 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Fri, 20 Jul 2018 10:59:35 +0000 Received: from dhcp-10-21-25-168.Nvidia.com (Not Verified[10.21.25.201]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Fri, 20 Jul 2018 03:59:35 -0700 From: Aapo Vienamo To: Rob Herring , Mark Rutland , Thierry Reding , Jonathan Hunter , Mikko Perttunen , "Laxman Dewangan" CC: Aapo Vienamo , , , Subject: [PATCH v5 6/7] soc/tegra: pmc: Remove public pad voltage APIs Date: Fri, 20 Jul 2018 13:59:14 +0300 Message-ID: <1532084355-31482-7-git-send-email-avienamo@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532084355-31482-1-git-send-email-avienamo@nvidia.com> References: <1532084355-31482-1-git-send-email-avienamo@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Make tegra_io_pad_set_voltage() and tegra_io_pad_get_voltage() static and remove the prototypes from pmc.h. Remove enum tegra_io_pad_voltage and use the defines from instead. These functions aren't used outside of the pmc driver and new use cases should use the pinctrl interface instead. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter --- drivers/soc/tegra/pmc.c | 17 ++++++++--------- include/soc/tegra/pmc.h | 19 ------------------- 2 files changed, 8 insertions(+), 28 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 38cb915..979f4b4 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -45,6 +45,8 @@ #include #include +#include + #define PMC_CNTRL 0x0 #define PMC_CNTRL_INTR_POLARITY BIT(17) /* inverts INTR polarity */ #define PMC_CNTRL_CPU_PWRREQ_OE BIT(16) /* CPU pwr req enable */ @@ -1092,8 +1094,7 @@ static int tegra_io_pad_is_powered(enum tegra_io_pad id) return !(value & mask); } -int tegra_io_pad_set_voltage(enum tegra_io_pad id, - enum tegra_io_pad_voltage voltage) +static int tegra_io_pad_set_voltage(enum tegra_io_pad id, int voltage) { const struct tegra_io_pad_soc *pad; u32 value; @@ -1109,7 +1110,7 @@ int tegra_io_pad_set_voltage(enum tegra_io_pad id, if (pmc->soc->has_impl_33v_pwr) { value = tegra_pmc_readl(PMC_IMPL_E_33V_PWR); - if (voltage == TEGRA_IO_PAD_1800000UV) + if (voltage == TEGRA_IO_PAD_VOLTAGE_1V8) value &= ~BIT(pad->voltage); else value |= BIT(pad->voltage); @@ -1123,7 +1124,7 @@ int tegra_io_pad_set_voltage(enum tegra_io_pad id, /* update I/O voltage */ value = tegra_pmc_readl(PMC_PWR_DET_VALUE); - if (voltage == TEGRA_IO_PAD_1800000UV) + if (voltage == TEGRA_IO_PAD_VOLTAGE_1V8) value &= ~BIT(pad->voltage); else value |= BIT(pad->voltage); @@ -1137,9 +1138,8 @@ int tegra_io_pad_set_voltage(enum tegra_io_pad id, return 0; } -EXPORT_SYMBOL(tegra_io_pad_set_voltage); -int tegra_io_pad_get_voltage(enum tegra_io_pad id) +static int tegra_io_pad_get_voltage(enum tegra_io_pad id) { const struct tegra_io_pad_soc *pad; u32 value; @@ -1157,11 +1157,10 @@ int tegra_io_pad_get_voltage(enum tegra_io_pad id) value = tegra_pmc_readl(PMC_PWR_DET_VALUE); if ((value & BIT(pad->voltage)) == 0) - return TEGRA_IO_PAD_1800000UV; + return TEGRA_IO_PAD_VOLTAGE_1V8; - return TEGRA_IO_PAD_3300000UV; + return TEGRA_IO_PAD_VOLTAGE_3V3; } -EXPORT_SYMBOL(tegra_io_pad_get_voltage); /** * tegra_io_rail_power_on() - enable power to I/O rail diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h index 445aa66..5624268 100644 --- a/include/soc/tegra/pmc.h +++ b/include/soc/tegra/pmc.h @@ -141,16 +141,6 @@ enum tegra_io_pad { #define TEGRA_IO_RAIL_HDMI TEGRA_IO_PAD_HDMI #define TEGRA_IO_RAIL_LVDS TEGRA_IO_PAD_LVDS -/** - * enum tegra_io_pad_voltage - voltage level of the I/O pad's source rail - * @TEGRA_IO_PAD_1800000UV: 1.8 V - * @TEGRA_IO_PAD_3300000UV: 3.3 V - */ -enum tegra_io_pad_voltage { - TEGRA_IO_PAD_1800000UV, - TEGRA_IO_PAD_3300000UV, -}; - #ifdef CONFIG_SOC_TEGRA_PMC int tegra_powergate_is_powered(unsigned int id); int tegra_powergate_power_on(unsigned int id); @@ -163,9 +153,6 @@ int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk, int tegra_io_pad_power_enable(enum tegra_io_pad id); int tegra_io_pad_power_disable(enum tegra_io_pad id); -int tegra_io_pad_set_voltage(enum tegra_io_pad id, - enum tegra_io_pad_voltage voltage); -int tegra_io_pad_get_voltage(enum tegra_io_pad id); /* deprecated, use tegra_io_pad_power_{enable,disable}() instead */ int tegra_io_rail_power_on(unsigned int id); @@ -213,12 +200,6 @@ static inline int tegra_io_pad_power_disable(enum tegra_io_pad id) return -ENOSYS; } -static inline int tegra_io_pad_set_voltage(enum tegra_io_pad id, - enum tegra_io_pad_voltage voltage) -{ - return -ENOSYS; -} - static inline int tegra_io_pad_get_voltage(enum tegra_io_pad id) { return -ENOSYS; -- 2.7.4