Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp3655479imm; Fri, 20 Jul 2018 23:48:14 -0700 (PDT) X-Google-Smtp-Source: AAOMgpd/+gjBaqbeE32eKChLuGNGx4l3HQbCvPB3XA9SPj3Ebh3gTBqz2BhqXAUSQlbZxOZ/jnbe X-Received: by 2002:a17:902:7b97:: with SMTP id w23-v6mr4905837pll.66.1532155694140; Fri, 20 Jul 2018 23:48:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532155694; cv=none; d=google.com; s=arc-20160816; b=zkLaxmrBr+I8FlHeC58siSCLGeAtBvFyc5ttbEzrW8l2RNy9uEfNUWAGRl9xhc25mJ Ck3+tAVXeUNOVauU032CZoVUd5I+aYZTU5E+ItPnKbeEmiDYfqyZPbdbdoRao7eunYiF vs8sRjouN+h9AjiUp5UUg9xMf7s+PQMiD2uF4ZAxycrv3pRzDEfncb+leElW2T7NpATX 56be1zqJU63AOSl+PINdfgHfl7/avb+qpFGUNvPiyDOuGxlVtKp6m1HzH7/0aD79SQJh h0PMc+Oo2fY/QhFL2fEz2Ar4PDu6s0mfoEdz3BmA5WC4TDWQ3FXkjvFalDeDtHjFzc1Y xkiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date :arc-authentication-results; bh=GxzNq84ZkUSi2vr+zgOfr0RllBUFOJlDnvj3jpgb+Ow=; b=NWGFTiknUVQ84iCFg8zD+ArQ+OW4H0vcQOGMFaiRfP3++0g2iKmJ5xFD/PRIRwo+o5 VfU9xeAwmEydOSPpZGCJ9nIHDT0GLjFqG8OwGxWY10oOWl6rFCITolHTzsEVjhsrN2PR 0UY+pNNm4YJZFaXCh3QGIgCowxYFhNpz4kwruG/QQv35mLRXbYOUhqYSt8aX6yioSMPt mPTYdUC0OEW1ZLcFuWMnRWzXhZdo2OhgW1zip23CZ4mOsOnLIdsuRMIhHiNOzArXJoGc 1mEJjwJBxM/uTeRQI1Y/VVsQrOWz/E/55YlRDZAMGTijBnk7MmrPvJhxbg1OiD5uIJS4 ehow== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 62-v6si3324785ply.520.2018.07.20.23.47.59; Fri, 20 Jul 2018 23:48:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727331AbeGUHiJ (ORCPT + 99 others); Sat, 21 Jul 2018 03:38:09 -0400 Received: from mail.bootlin.com ([62.4.15.54]:42620 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727041AbeGUHiJ (ORCPT ); Sat, 21 Jul 2018 03:38:09 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 2669E207AD; Sat, 21 Jul 2018 08:46:31 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon (unknown [37.173.220.171]) by mail.bootlin.com (Postfix) with ESMTPSA id 0E2962072F; Sat, 21 Jul 2018 08:46:28 +0200 (CEST) Date: Sat, 21 Jul 2018 08:46:27 +0200 From: Boris Brezillon To: Miquel Raynal Cc: Wenyou Yang , Josh Wu , Tudor Ambarus , Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Nicolas Ferre , Alexandre Belloni , Kamal Dasu , Masahiro Yamada , Han Xu , Harvey Hunt , Vladimir Zapolskiy , Sylvain Lemieux , Xiaolei Li , Matthias Brugger , Maxime Ripard , Chen-Yu Tsai , Marc Gonzalez , Mans Rullgard , Stefan Agner , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-mediatek@lists.infradead.org Subject: Re: [PATCH v4 04/35] mtd: rawnand: denali: convert to nand_scan() Message-ID: <20180721084627.3c87f4a9@bbrezillon> In-Reply-To: <20180720151527.16038-5-miquel.raynal@bootlin.com> References: <20180720151527.16038-1-miquel.raynal@bootlin.com> <20180720151527.16038-5-miquel.raynal@bootlin.com> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 20 Jul 2018 17:14:56 +0200 Miquel Raynal wrote: > Two helpers have been added to the core to make ECC-related > configuration between the detection phase and the final NAND scan. Use > these hooks and convert the driver to just use nand_scan() instead of > both nand_scan_ident() and nand_scan_tail(). > > Signed-off-by: Miquel Raynal Reviewed-by: Boris Brezillon > --- > drivers/mtd/nand/raw/denali.c | 138 +++++++++++++++++++++++------------------- > 1 file changed, 77 insertions(+), 61 deletions(-) > > diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c > index 4d53f41ada08..2fa92c297a66 100644 > --- a/drivers/mtd/nand/raw/denali.c > +++ b/drivers/mtd/nand/raw/denali.c > @@ -1205,62 +1205,12 @@ static int denali_multidev_fixup(struct denali_nand_info *denali) > return 0; > } > > -int denali_init(struct denali_nand_info *denali) > +static int denali_attach_chip(struct nand_chip *chip) > { > - struct nand_chip *chip = &denali->nand; > struct mtd_info *mtd = nand_to_mtd(chip); > - u32 features = ioread32(denali->reg + FEATURES); > + struct denali_nand_info *denali = mtd_to_denali(mtd); > int ret; > > - mtd->dev.parent = denali->dev; > - denali_hw_init(denali); > - > - init_completion(&denali->complete); > - spin_lock_init(&denali->irq_lock); > - > - denali_clear_irq_all(denali); > - > - ret = devm_request_irq(denali->dev, denali->irq, denali_isr, > - IRQF_SHARED, DENALI_NAND_NAME, denali); > - if (ret) { > - dev_err(denali->dev, "Unable to request IRQ\n"); > - return ret; > - } > - > - denali_enable_irq(denali); > - denali_reset_banks(denali); > - > - denali->active_bank = DENALI_INVALID_BANK; > - > - nand_set_flash_node(chip, denali->dev->of_node); > - /* Fallback to the default name if DT did not give "label" property */ > - if (!mtd->name) > - mtd->name = "denali-nand"; > - > - chip->select_chip = denali_select_chip; > - chip->read_byte = denali_read_byte; > - chip->write_byte = denali_write_byte; > - chip->read_word = denali_read_word; > - chip->cmd_ctrl = denali_cmd_ctrl; > - chip->dev_ready = denali_dev_ready; > - chip->waitfunc = denali_waitfunc; > - > - if (features & FEATURES__INDEX_ADDR) { > - denali->host_read = denali_indexed_read; > - denali->host_write = denali_indexed_write; > - } else { > - denali->host_read = denali_direct_read; > - denali->host_write = denali_direct_write; > - } > - > - /* clk rate info is needed for setup_data_interface */ > - if (denali->clk_rate && denali->clk_x_rate) > - chip->setup_data_interface = denali_setup_data_interface; > - > - ret = nand_scan_ident(mtd, denali->max_banks, NULL); > - if (ret) > - goto disable_irq; > - > if (ioread32(denali->reg + FEATURES) & FEATURES__DMA) > denali->dma_avail = 1; > > @@ -1293,7 +1243,7 @@ int denali_init(struct denali_nand_info *denali) > mtd->oobsize - denali->oob_skip_bytes); > if (ret) { > dev_err(denali->dev, "Failed to setup ECC settings.\n"); > - goto disable_irq; > + return ret; > } > > dev_dbg(denali->dev, > @@ -1337,7 +1287,7 @@ int denali_init(struct denali_nand_info *denali) > > ret = denali_multidev_fixup(denali); > if (ret) > - goto disable_irq; > + return ret; > > /* > * This buffer is DMA-mapped by denali_{read,write}_page_raw. Do not > @@ -1345,26 +1295,92 @@ int denali_init(struct denali_nand_info *denali) > * guarantee DMA-safe alignment. > */ > denali->buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); > - if (!denali->buf) { > - ret = -ENOMEM; > - goto disable_irq; > + if (!denali->buf) > + return -ENOMEM; > + > + return 0; > +} > + > +static void denali_detach_chip(struct nand_chip *chip) > +{ > + struct mtd_info *mtd = nand_to_mtd(chip); > + struct denali_nand_info *denali = mtd_to_denali(mtd); > + > + kfree(denali->buf); > +} > + > +static const struct nand_controller_ops denali_controller_ops = { > + .attach_chip = denali_attach_chip, > + .detach_chip = denali_detach_chip, > +}; > + > +int denali_init(struct denali_nand_info *denali) > +{ > + struct nand_chip *chip = &denali->nand; > + struct mtd_info *mtd = nand_to_mtd(chip); > + u32 features = ioread32(denali->reg + FEATURES); > + int ret; > + > + mtd->dev.parent = denali->dev; > + denali_hw_init(denali); > + > + init_completion(&denali->complete); > + spin_lock_init(&denali->irq_lock); > + > + denali_clear_irq_all(denali); > + > + ret = devm_request_irq(denali->dev, denali->irq, denali_isr, > + IRQF_SHARED, DENALI_NAND_NAME, denali); > + if (ret) { > + dev_err(denali->dev, "Unable to request IRQ\n"); > + return ret; > + } > + > + denali_enable_irq(denali); > + denali_reset_banks(denali); > + > + denali->active_bank = DENALI_INVALID_BANK; > + > + nand_set_flash_node(chip, denali->dev->of_node); > + /* Fallback to the default name if DT did not give "label" property */ > + if (!mtd->name) > + mtd->name = "denali-nand"; > + > + chip->select_chip = denali_select_chip; > + chip->read_byte = denali_read_byte; > + chip->write_byte = denali_write_byte; > + chip->read_word = denali_read_word; > + chip->cmd_ctrl = denali_cmd_ctrl; > + chip->dev_ready = denali_dev_ready; > + chip->waitfunc = denali_waitfunc; > + > + if (features & FEATURES__INDEX_ADDR) { > + denali->host_read = denali_indexed_read; > + denali->host_write = denali_indexed_write; > + } else { > + denali->host_read = denali_direct_read; > + denali->host_write = denali_direct_write; > } > > - ret = nand_scan_tail(mtd); > + /* clk rate info is needed for setup_data_interface */ > + if (denali->clk_rate && denali->clk_x_rate) > + chip->setup_data_interface = denali_setup_data_interface; > + > + chip->dummy_controller.ops = &denali_controller_ops; > + ret = nand_scan(mtd, denali->max_banks); > if (ret) > - goto free_buf; > + goto disable_irq; > > ret = mtd_device_register(mtd, NULL, 0); > if (ret) { > dev_err(denali->dev, "Failed to register MTD: %d\n", ret); > goto cleanup_nand; > } > + > return 0; > > cleanup_nand: > nand_cleanup(chip); > -free_buf: > - kfree(denali->buf); > disable_irq: > denali_disable_irq(denali); >