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[209.132.180.67]) by mx.google.com with ESMTP id l63-v6si3524812pfg.326.2018.07.21.00.29.57; Sat, 21 Jul 2018 00:30:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727379AbeGUIUv (ORCPT + 99 others); Sat, 21 Jul 2018 04:20:51 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:59683 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727251AbeGUIUv (ORCPT ); Sat, 21 Jul 2018 04:20:51 -0400 X-UUID: f410e4f938cc42fd82930e08245d58cd-20180721 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1567957997; Sat, 21 Jul 2018 15:28:59 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Sat, 21 Jul 2018 15:28:54 +0800 Received: from [172.21.77.4] (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Sat, 21 Jul 2018 15:28:54 +0800 Message-ID: <1532158134.16009.10.camel@mtksdaap41> Subject: Re: [PATCH v3 0/4] Add basic support for Mediatek MT8183 SoC From: Erin Lo To: Matthias Brugger CC: Mark Rutland , , "Jason Cooper" , srv_heupstream , Marc Zyngier , "Greg Kroah-Hartman" , , Rob Herring , , , , , Thomas Gleixner , Date: Sat, 21 Jul 2018 15:28:54 +0800 In-Reply-To: <2ca76468-198b-b764-c974-374e567e0c93@gmail.com> References: <1526538126-51497-1-git-send-email-erin.lo@mediatek.com> <9ba45353-a6e1-9a6e-f05b-4b1679ae9e52@gmail.com> <1532074769.19148.2.camel@mtksdaap41> <2ca76468-198b-b764-c974-374e567e0c93@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2018-07-20 at 12:44 +0200, Matthias Brugger wrote: > > On 20/07/18 10:19, Erin Lo wrote: > > On Mon, 2018-07-16 at 11:28 +0200, Matthias Brugger wrote: > >> Hi Erin, > >> > >> On 17/05/18 08:22, Erin Lo wrote: > >>> MT8183 is a SoC based on 64bit ARMv8 architecture. > >>> It contains 4 CA53 and 4 CA73 cores. > >>> MT8183 share many HW IP with MT65xx series. > >>> This patchset was tested on MT8183 evaluation board, and boot to shell ok. > >>> > >>> This series contains document bindings, device tree including interrupt, uart. > >>> > >>> Change in v3: > >>> 1. Fill out GICC, GICH, GICV regions > >>> 2. Update Copyright to 2018 > >>> > >>> Change in v2: > >>> 1. Split dt-bindings into different patches > >>> 2. Correct bindings for supported SoCs (mtk-uart.txt) > >>> > >>> Ben Ho (1): > >>> arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and > >>> Makefile > >>> > >>> Erin Lo (3): > >>> dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform > >>> dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 > >>> dt-bindings: serial: Add compatible for Mediatek MT8183 > >>> > >> > >> I'm a bit reluctant to take this series, as it will only enable the EVB board to > >> boot into a serial console. Are you planning to add support for other devices of > >> this SoC? > >> > >> Apart please take into account that there is an issue with the dts file, as you > >> were told by the kbuild test robot. > >> > >> Regards, > >> Matthias > >> > > > > Hi, Matthias > > Sorry for missing this letter...since mail proxy server. > > We plan to add support all the devices of MT8183 in serious. > > We have implemented the clock and pinctrl driver for upstream and they > > are in internal review right now. > > > > Nice to hear that :) > > > About the dts issue... do you suggest me to send new patch right now or > > wait for clock and pinctrl driver ready then send them together? > > > > I would prefer that you send at least the clock controller together, so that we > don't have any dummy clocks in the basic device tree. > > Regards, > Matthias > Got it! Next patch, we will send them with clock controller without dummy clocks in the basic device tree. By the way, the clock controller driver of MT8183 is a little bit different from former ICs, so we need more time to prepare them. We will send them to public as soon as possible. Best Regards, Erin > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek