Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp3824517imm; Sat, 21 Jul 2018 04:09:31 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcXZhpyGn356Lyd1qV0Su2JGMqyOni28MNPWQ475H0/m31qqUC5Rxdle+dsmTNQNWThDfgU X-Received: by 2002:a63:8b44:: with SMTP id j65-v6mr5328409pge.248.1532171371605; Sat, 21 Jul 2018 04:09:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532171371; cv=none; d=google.com; s=arc-20160816; b=0f8e6+tXi43ur/NihzgWjym76DeOSuBoXZrjFqaM6pAToNoyCU46fH1eJY9pdf6q4J rBIR63h4/RNVrXmVe0JmQmGnY+z86KRiUJAXuhQlVjoboLh1MI1nbA/0BWEGDxdMK2Y3 FpdeG9RIq665pkzlD4q7LbZfd0qUhzBMFudgE5wfdybHlCdZW57DKHI7IWGD3aI9KZPZ aKCS9DhTCTe3oFl1M9ALlqHsSjX8+fVABzQQ7WxV+T096DSir86VmBlu5ewSz06TtOIX O5fm7Vo3N+vMfA1ROllNXj1nBdbku1mWwvNUe7lY5JOArE8VIbCDAdw583D1ezeE9e4N 28Gg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=NI6gMHkrQ4N2cLl51YaYvZ27t2JNmQZvj+Ey5pY5pTA=; b=mENP/a5BWi6oP2NdL+s4Q7C8/6e6V1ALLU73PCrKn2heY/iJrZqgdoIUGRIb4Za39D c3G9uUUhsEw/RJP5pMSSrmL6K3XuAMEgySMnqiVicuzquGlvYvy5CSHsQVgQG1iMRPCx CUZzQOggch1iTRygWBcPgnijRqkCe7b9U5+QvoesKd8RKvvT0NFHzn73TrZ7UXU2qdSF lYwIweh85OSCdHVxizuo8ZxR5fC9bKDToiJAOkYWOpCpZlS30gGk1/l9Ark5+XROKoAp 8ph664ivvy/LZyXsjEWmpPQFYC0zHygf/v0QPzaNZx0/xD8AsleStbhDxPRr1BCV20VS Qwrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@crapouillou.net header.s=mail header.b=oP3SHTSK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f3-v6si3563952plr.214.2018.07.21.04.09.04; Sat, 21 Jul 2018 04:09:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@crapouillou.net header.s=mail header.b=oP3SHTSK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727737AbeGUL76 (ORCPT + 99 others); Sat, 21 Jul 2018 07:59:58 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:41598 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727500AbeGUL76 (ORCPT ); Sat, 21 Jul 2018 07:59:58 -0400 From: Paul Cercueil To: Vinod Koul , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , James Hogan , Zubair Lutfullah Kakakhel Cc: Mathieu Malaterre , Daniel Silsby , Paul Cercueil , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org Subject: [PATCH v3 01/18] doc: dt-bindings: jz4780-dma: Update bindings to reflect driver changes Date: Sat, 21 Jul 2018 13:06:26 +0200 Message-Id: <20180721110643.19624-2-paul@crapouillou.net> In-Reply-To: <20180721110643.19624-1-paul@crapouillou.net> References: <20180721110643.19624-1-paul@crapouillou.net> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1532171256; bh=NI6gMHkrQ4N2cLl51YaYvZ27t2JNmQZvj+Ey5pY5pTA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=oP3SHTSKO5p6H9XBnB2qxvN/bZGCuYZxOvMzkBU3rBGHfPwm7KOFMrmiEmosZFw0PwTrhVpkkliC2DysnJ9cD1W3laXD58T3+6BRH2mD+/nRjQk3M6duxF8+y6KRlr4oO8pjuhEYOgzpC+GTfr6HXHPHOvTKI9XAqIBP86KUKkQ= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver is now compatible with four SoCs: JZ4780, JZ4770, JZ4725B and JZ4740. Besides, it now expects the devicetree to supply a second memory resource. This resource is mandatory on the newly supported SoCs. For the JZ4780, new devicetree code must also provide it, although the driver is still compatible with older devicetree binaries. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre --- Documentation/devicetree/bindings/dma/jz4780-dma.txt | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) v2: New patch in this series; regroups the changes made to the jz4780-dma.txt doc file in the previous version of the patchset. v3: Updated example to comply with devicetree specification diff --git a/Documentation/devicetree/bindings/dma/jz4780-dma.txt b/Documentation/devicetree/bindings/dma/jz4780-dma.txt index f25feee62b15..14f33305e194 100644 --- a/Documentation/devicetree/bindings/dma/jz4780-dma.txt +++ b/Documentation/devicetree/bindings/dma/jz4780-dma.txt @@ -2,8 +2,13 @@ Required properties: -- compatible: Should be "ingenic,jz4780-dma" -- reg: Should contain the DMA controller registers location and length. +- compatible: Should be one of: + * ingenic,jz4740-dma + * ingenic,jz4725b-dma + * ingenic,jz4770-dma + * ingenic,jz4780-dma +- reg: Should contain the DMA channel registers location and length, followed + by the DMA controller registers location and length. - interrupts: Should contain the interrupt specifier of the DMA controller. - interrupt-parent: Should be the phandle of the interrupt controller that - clocks: Should contain a clock specifier for the JZ4780 PDMA clock. @@ -20,9 +25,10 @@ Optional properties: Example: -dma: dma@13420000 { +dma: dma-controller@13420000 { compatible = "ingenic,jz4780-dma"; - reg = <0x13420000 0x10000>; + reg = <0x13420000 0x400 + 0x13421000 0x40>; interrupt-parent = <&intc>; interrupts = <10>; -- 2.11.0