Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp3825013imm; Sat, 21 Jul 2018 04:10:08 -0700 (PDT) X-Google-Smtp-Source: AAOMgpehVCn4d+XAeiQKbw/SHS+eN2GXukQUI+rzFzTLtzNCFQIyGWc8j45AqWBA4zVEPnv1YeTl X-Received: by 2002:a63:67c3:: with SMTP id b186-v6mr5338826pgc.5.1532171408821; Sat, 21 Jul 2018 04:10:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532171408; cv=none; d=google.com; s=arc-20160816; b=p1nngLsAn71Cqu62Abumq8Q6BUql9bOGoPy9Q70yLB5f5XGxUexWT11aAVDzXXZmGC /AdGTA0c4nkWBsA3Vtm76t2hacsOouYiY5fWQ6B+725iqJX2xp3DkHTC40BwpwEVu9bX xZ/MvYW7Am5xDvkDZbAHwr/AS1SRSSluy0N7Et0cj2/bKPuzN1/OGGx2L+1Fiin2PrGg svAbsC9Vuqj70ewJwsnHc5X+S8CfmwbYP5v8aEPUi4TX+KafuJKOo/PvHWxu1fXMTWN/ ZTolG1rtRxNhAYk7VV0mgAlYyDFLCVLpTxCjFHz2Wfj7rLrL1JrorcCd/SpHpbiWNLYO SwTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=cCn7nWOCI3UnnJ0C9He+kWXSgQ3As3oI7G37pKJTZF4=; b=Ik2T+0eukXxYW2hwPEpd2JmQkxRNAMwUMcaRik9WAFVLn4kNru6KA7bWFaufZQOuqE m+bjZr6q63SMjsnm1Np/K1xcLfakzG/ytrsrKTMLawuvPBWLsv22q2Xs8m20NVavbbuf 56MXMK8u8Jfc0s4AuXrl0QoyqQQBZnJ6L+0Cbyxb+f/OKmqEBVlNeNjDDXG7ig5YuNxB /iAMt9KQI06jJ03Mc8dm2pRQCHCBFvVnjNflAh+XfO4TYFvvuOX+2eHBE/nTsVX+FNcf vEP36SiamAJLV9gzsuA0eH/z6QL/xjE4D88WOMDFm6nOBCQvvgTqPJVHjlf9xaF+wvOC Vm/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@crapouillou.net header.s=mail header.b=KA+FBUfY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l6-v6si3923036plt.497.2018.07.21.04.09.54; Sat, 21 Jul 2018 04:10:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@crapouillou.net header.s=mail header.b=KA+FBUfY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729804AbeGUMA7 (ORCPT + 99 others); Sat, 21 Jul 2018 08:00:59 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:44658 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728277AbeGUMAO (ORCPT ); Sat, 21 Jul 2018 08:00:14 -0400 From: Paul Cercueil To: Vinod Koul , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , James Hogan , Zubair Lutfullah Kakakhel Cc: Mathieu Malaterre , Daniel Silsby , Paul Cercueil , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org Subject: [PATCH v3 11/18] dmaengine: dma-jz4780: Add missing residue DTC mask Date: Sat, 21 Jul 2018 13:06:36 +0200 Message-Id: <20180721110643.19624-12-paul@crapouillou.net> In-Reply-To: <20180721110643.19624-1-paul@crapouillou.net> References: <20180721110643.19624-1-paul@crapouillou.net> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1532171272; bh=cCn7nWOCI3UnnJ0C9He+kWXSgQ3As3oI7G37pKJTZF4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=KA+FBUfYn4uQEfj4GBiLVCFt4Ee3NdN1NtJGGmELvYHPegjH3ipMCsNrMTmnHQl3lPasD07uhmjKSmjHCk1rJE8muCFRATHy70uUZQcsK/T/VMdElRJb783UD59U9y2UgEL2RTo5NGDaATY9vTYdgGdcDOT83VAJx4FwaCOVoD8= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Daniel Silsby The 'dtc' word in jz DMA descriptors contains two fields: The lowest 24 bits are the transfer count, and upper 8 bits are the DOA offset to next descriptor. The upper 8 bits are now correctly masked off when computing residue in jz4780_dma_desc_residue(). Note that reads of the DTCn hardware reg are automatically masked this way. Signed-off-by: Daniel Silsby Tested-by: Mathieu Malaterre --- drivers/dma/dma-jz4780.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) v2: No change v3: No change diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c index 3c9d3952e23a..fa926de082ba 100644 --- a/drivers/dma/dma-jz4780.c +++ b/drivers/dma/dma-jz4780.c @@ -614,7 +614,8 @@ static size_t jz4780_dma_desc_residue(struct jz4780_dma_chan *jzchan, residue = 0; for (i = next_sg; i < desc->count; i++) - residue += desc->desc[i].dtc << jzchan->transfer_shift; + residue += (desc->desc[i].dtc & 0xffffff) << + jzchan->transfer_shift; if (next_sg != 0) { count = jz4780_dma_chn_readl(jzdma, jzchan->id, -- 2.11.0