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[209.132.180.67]) by mx.google.com with ESMTP id v9-v6si5936183pfg.123.2018.07.21.23.02.37; Sat, 21 Jul 2018 23:02:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728488AbeGVGz4 (ORCPT + 99 others); Sun, 22 Jul 2018 02:55:56 -0400 Received: from hermes.aosc.io ([199.195.250.187]:45545 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725940AbeGVGzz (ORCPT ); Sun, 22 Jul 2018 02:55:55 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id F087D9F536; Sun, 22 Jul 2018 06:00:21 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Kishon Vijay Abraham I Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v3 6/9] dt-bindings: phy: add binding for Allwinner USB3 PHY Date: Sun, 22 Jul 2018 13:57:36 +0800 Message-Id: <20180722055739.26464-7-icenowy@aosc.io> In-Reply-To: <20180722055739.26464-1-icenowy@aosc.io> References: <20180722055739.26464-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The new Allwinner H6 SoC contains a USB3 PHY that is wired to the external USB3 pins of the SoC. Add a device tree binding for the PHY. Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai --- Changes in v3: - Added Chen-Yu's Review tag. Rob, Although you mentioned that the supply is for the port, not the phy; currently in USB situation "powering on the PHY" also indicates "powering on the port" and nearly all usages of phy-supply is for Vbus. Maybe we should change the overall phy-supply to satisfy this. Thanks, Icenowy .../bindings/phy/sun50i-usb3-phy.txt | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt diff --git a/Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt b/Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt new file mode 100644 index 000000000000..912d55f9f69d --- /dev/null +++ b/Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt @@ -0,0 +1,24 @@ +Allwinner sun50i USB3 PHY +----------------------- + +Required properties: +- compatible : should be one of + * allwinner,sun60i-h6-usb3-phy +- reg : a list of offset + length pairs +- #phy-cells : from the generic phy bindings, must be 0 +- clocks : phandle + clock specifier for the phy clock +- resets : phandle + reset specifier for the phy reset + +Optional Properties: +- phy-supply : from the generic phy bindings, a phandle to a regulator that + provides power to VBUS. + +Example: + usb3phy: phy@5210000 { + compatible = "allwinner,sun50i-h6-usb3-phy"; + reg = <0x5210000 0x10000>; + clocks = <&ccu CLK_USB_PHY1>; + resets = <&ccu RST_USB_PHY1>; + #phy-cells = <0>; + status = "disabled"; + }; -- 2.18.0