Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp4529911imm; Sat, 21 Jul 2018 23:03:29 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcLVLH52om50f9b5qBmPdTrN8Qk9HzF8DNYqzgY7jGUi+L0Q2EDUMbcY/9FwVNpOKekuerW X-Received: by 2002:a17:902:e85:: with SMTP id 5-v6mr8113834plx.318.1532239409442; Sat, 21 Jul 2018 23:03:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532239409; cv=none; d=google.com; s=arc-20160816; b=n+iTRrkA4aZQsw8yL6KiLMDN8u/lrR88mSfUWuH31abou26oMpeGYy+h3DgCDE1Rx5 w5oVP0sqb1/xreQlQvpyyylP99So3TseCp+tuyYBpYEoioPiR4XPWY6JDgW3PbqZHPLg jVDLxg7fVaAXtgmXBeNBRzU4JZtAD79iJhb/O8xujhilBvp3BuqVJxQqgJ0hDFCPHuCI SWzFA3aslZoQB7bi6pC6XQSJIXqGbpHszgLulih4wFORpx/iytt9d+GK5NjsrT8vxHpZ VJkFwaFsenRh/pA0np5sVqBn+M2RGb+j+iM2CgTpD6cz7I3wLNZvbmM49GpeorTnjrXZ RacA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=kIxKwl98QGI6/EQNJSpjoHjjwfY1b3r+QrywR8pDXgY=; b=mQMhsAYyEAYDyrcyw9j9IPxJcii3I2l14htjIcSwB3U7eGv8sS/r9mr1yd/KauDVzM gXCeanqhacm0zwUMcg0DIT/sORNvGJQeOB6NbfRZ27+DJmbeKV9McdwgTxzxt/iLMioI liFzBJVxcnvJsg4mYQfv0LcypEaKYSr9CsGMbFjOf38txWKhRdom18N8PmIWp1Un9iaI gAFWsv+XOzTAnu4n1KsBpxvqSLrQ+d7cHGIu2/MzVzjjmFlTnRyO2LTKl50VaYZMzSKz bnNEtfq8yytZ2nO5s98jTQmUyahbd4C1NaAQ+bpvprtAYoRjWcGSgECxbeIfiyY4xD8i n4FA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l12-v6si5197610plc.215.2018.07.21.23.03.15; Sat, 21 Jul 2018 23:03:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728312AbeGVG5P (ORCPT + 99 others); Sun, 22 Jul 2018 02:57:15 -0400 Received: from hermes.aosc.io ([199.195.250.187]:45646 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725940AbeGVG5P (ORCPT ); Sun, 22 Jul 2018 02:57:15 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 81A5E9F55A; Sun, 22 Jul 2018 06:01:39 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Kishon Vijay Abraham I Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v3 8/9] arm64: allwinner: dts: h6: add USB3 device nodes Date: Sun, 22 Jul 2018 13:57:38 +0800 Message-Id: <20180722055739.26464-9-icenowy@aosc.io> In-Reply-To: <20180722055739.26464-1-icenowy@aosc.io> References: <20180722055739.26464-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Allwinner H6 SoC features USB3 functionality, with a DWC3 controller and a custom PHY. Add device tree nodes for them. Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai --- Changes in v3: - Changed the dwc3 clock according to the user manual. - Added Chen-Yu's Review tag. arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 32 ++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 454844e8b063..59c448726a10 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -290,6 +290,38 @@ status = "disabled"; }; + dwc3: dwc3@5200000 { + compatible = "snps,dwc3"; + reg = <0x05200000 0x10000>; + interrupts = ; + clocks = <&ccu CLK_BUS_XHCI>, + <&ccu CLK_BUS_XHCI>, + <&osc32k>; + clock-names = "ref", "bus_early", "suspend"; + resets = <&ccu RST_BUS_XHCI>; + /* + * The datasheet of the chip doesn't declare the + * peripheral function, and there's no boards known + * to have a USB Type-B port routed to the port. + * In addition, no one has tested the peripheral + * function yet. + * So set the dr_mode to "host" in the DTSI file. + */ + dr_mode = "host"; + phys = <&usb3phy>; + phy-names = "usb3-phy"; + status = "disabled"; + }; + + usb3phy: phy@5210000 { + compatible = "allwinner,sun50i-h6-usb3-phy"; + reg = <0x5210000 0x10000>; + clocks = <&ccu CLK_USB_PHY1>; + resets = <&ccu RST_USB_PHY1>; + #phy-cells = <0>; + status = "disabled"; + }; + ehci3: usb@5311000 { compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; reg = <0x05311000 0x100>; -- 2.18.0