Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp6702500imm; Tue, 24 Jul 2018 01:18:40 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcizzXEkFmCsauu23Tz6Tz9bFJUtMxPIqsKReR0pK9SI/2Q+aheOce4GjSf0miFhhmnoLX8 X-Received: by 2002:a65:4b87:: with SMTP id t7-v6mr15167033pgq.391.1532420320900; Tue, 24 Jul 2018 01:18:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532420320; cv=none; d=google.com; s=arc-20160816; b=eLspgE1K7g8GchMMmLlhzidlPMqdjDUzVijcibz0deyFv9FKtj1G+Ecv9ZQAHXgT/V 1ooYZZLZaGOKnHNOJOU+XyeOaEWYzOdn2bj4pq34/lUtLuuEh+SDQsEaIXk5vq+H4dvm jTJz53/qajrGkvNWIuUTpAVcYU8Hg43ipu09yeMBr9tWL4Oo4GQaxuE7AG3r0QIThcoF 7CDc0ns9Kscg/OTYcyTNHVPhu1OsTgjRX/+YPWPGH9ZW65pYbl+GXvtVy3OrVcJMSy5C zZWucVTEVtjHg5BrYbbH2uw4HYR4BcrqoFxZYoWGqfmv4XTgGhfPHgR8pRl+7eIATsbq QUaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=ye+7dg5lk0Prw1lvcON7MlFwfYOFpZIXmApJi33Xb9s=; b=APJAIC9thO28t3o64RMcFsSGr/G7KCwtXrafuFHkcnxcb/vJOxXA6C/3KrJ2jUhHQx kujkmHN481uVGLTTTQWtMWtYKflBytJqhjaic4cgpy4DRU3YTq4CfD7nroxO77hFaaz1 vxFBFfGopqUyIj/hbZxr737XoqQA1vHXqKuvVmIoN8p6P04NZ0TDVNsB57vuovZ6vOk0 yXxwfVn1G5f2vhn2JowT2KHGwNm0Np00AvKALEZJ6ECOf+GC4VIzHKGy/tN0pLcYKS4c UiFvoGo2TDPhdoUeSY0CZJws0Fi3Zd1IZzdsUNKNWsoOMNoG0CFLozBktUDGheDwdcpA nIqQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n8-v6si10949660pgl.101.2018.07.24.01.18.26; Tue, 24 Jul 2018 01:18:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388730AbeGXJWs (ORCPT + 99 others); Tue, 24 Jul 2018 05:22:48 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:11920 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2388383AbeGXJWs (ORCPT ); Tue, 24 Jul 2018 05:22:48 -0400 X-UUID: 291763715bda4491b45129532e76ac7b-20180724 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1024719291; Tue, 24 Jul 2018 16:17:28 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 24 Jul 2018 16:17:20 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 24 Jul 2018 16:17:20 +0800 From: Stu Hsieh To: CK Hu , Philipp Zabel CC: David Airlie , Matthias Brugger , , , , , , Stu Hsieh Subject: [PATCH v1 01/15] drm/mediatek: add connection from RDMA0 to DPI1 Date: Tue, 24 Jul 2018 16:17:01 +0800 Message-ID: <1532420235-22268-2-git-send-email-stu.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1532420235-22268-1-git-send-email-stu.hsieh@mediatek.com> References: <1532420235-22268-1-git-send-email-stu.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch add connection from RDMA0 to DPI1 Signed-off-by: Stu Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index 87e4191c250e..03e3628b5b0d 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -106,6 +106,7 @@ #define OVL1_MOUT_EN_COLOR1 0x1 #define GAMMA_MOUT_EN_RDMA1 0x1 #define RDMA0_SOUT_DPI0 0x2 +#define RDMA0_SOUT_DPI1 0x3 #define RDMA0_SOUT_DSI2 0x4 #define RDMA0_SOUT_DSI3 0x5 #define RDMA1_SOUT_DPI0 0x2 @@ -224,6 +225,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DPI0) { *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; value = RDMA0_SOUT_DPI0; + } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DPI1) { + *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; + value = RDMA0_SOUT_DPI1; } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DSI2) { *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; value = RDMA0_SOUT_DSI2; -- 2.12.5