Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp6704318imm; Tue, 24 Jul 2018 01:20:55 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfAnW6DCZLnHeHPgKVsXHchfGLYxH09z4ZrRxIFq7O9bs0iTpFP+kSEWfR82XbGLq431ywI X-Received: by 2002:a63:5463:: with SMTP id e35-v6mr15581084pgm.115.1532420455437; Tue, 24 Jul 2018 01:20:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532420455; cv=none; d=google.com; s=arc-20160816; b=Wm70BOpPEtW3UWg5f1I3nCGAj2LCw8mdgq8Prqbcj+9bq7WwdzSZFzjsYeBBgePj5L lY456Rgu4rBvR4UhSxhcvx5d53GI7+BwXS+q2h2k+hDJG8f9YPr+35oLp3lkGLLz4Tu8 78QiT5LFGa63EKuPu9hlWLxeWbOmPFesOZ01oavhEGjOEJJ0bCIp1stl7CGtPIHSUbqM 7zyxbKYDne7ydsBJWbpuYav8OE5yh6t21y2ZQ34OW3jJrNHr0Y8I+Aj7LIFBnh+5xTVN Zj75suF2hLtIlSdF1BFBBbhdjiaKXGTUaVgJMvhCrYcxUys99s7c8S6ZZWbW5TkjIATa Ejxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=udQbx+g0Zr0J+XZ1Np1Ynp+qxlgDN/SEH0jScWg/o8E=; b=H7sr4PqkH52l3vR1U0Y1Eow+N4x0bhqlvindKJBVW3VxN3L/7GY6WPks9+XtthT9Sa FLjtPXDKYJyXcgWIU/dR46KlmijJHSEnbuFrnCXr/wjAeTdKhOc7sYHU3Qfbkf42Z7ki bwoIhB69XHjxl786eoG0ZgYwIZiMPK9UnKHAUM+8+eGsoNfsvRoXiuNdUedvrcfBDcno k5vtZgyUQSAWkHqsBEZ3GLqArUYIA9z2RI9b8Rr1gexJ9ZkkHoTAe3nQY2cIWTfkerPp +orq0UMXKbTaYQFHfsEIsRZfMg9TXzin5s55WpjPOKoaAOkr4sZUeYENSutgyvt6WbGp aQDg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t189-v6si11460729pgb.440.2018.07.24.01.20.41; Tue, 24 Jul 2018 01:20:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388618AbeGXJWp (ORCPT + 99 others); Tue, 24 Jul 2018 05:22:45 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:28280 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2388598AbeGXJWp (ORCPT ); Tue, 24 Jul 2018 05:22:45 -0400 X-UUID: e0f7add16a6a403ba366ef258b687ba3-20180724 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 939456496; Tue, 24 Jul 2018 16:17:22 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 24 Jul 2018 16:17:20 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 24 Jul 2018 16:17:20 +0800 From: Stu Hsieh To: CK Hu , Philipp Zabel CC: David Airlie , Matthias Brugger , , , , , , Stu Hsieh Subject: [PATCH v1 04/15] drm/mediatek: add connection from RDMA2 to DSI0 Date: Tue, 24 Jul 2018 16:17:04 +0800 Message-ID: <1532420235-22268-5-git-send-email-stu.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1532420235-22268-1-git-send-email-stu.hsieh@mediatek.com> References: <1532420235-22268-1-git-send-email-stu.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch add connection from RDMA2 to DSI0 Signed-off-by: Stu Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index 31189fad8d4e..3239f22785fd 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -125,6 +125,7 @@ #define DPI1_SEL_IN_RDMA1 (0x1 << 8) #define DPI1_SEL_IN_RDMA2 (0x3 << 8) #define DSI0_SEL_IN_RDMA1 0x1 +#define DSI0_SEL_IN_RDMA2 0x4 #define DSI1_SEL_IN_RDMA1 0x1 #define DSI1_SEL_IN_RDMA2 0x4 #define DSI2_SEL_IN_RDMA1 (0x1 << 16) @@ -309,6 +310,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI1) { *addr = DISP_REG_CONFIG_DPI_SEL_IN; value = DPI1_SEL_IN_RDMA2; + } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI0) { + *addr = DISP_REG_CONFIG_DSIE_SEL_IN; + value = DSI0_SEL_IN_RDMA2; } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DSI1) { *addr = DISP_REG_CONFIG_DSIE_SEL_IN; value = DSI1_SEL_IN_RDMA2; -- 2.12.5