Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp6732378imm; Tue, 24 Jul 2018 01:59:00 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdWqMSUEme5Sw8qONNqlqZKZpAUGHd+BjLVQ94/DPS/BL2BFbvQAa56KlMK8fvppFRYeJCv X-Received: by 2002:a63:4e22:: with SMTP id c34-v6mr15522251pgb.6.1532422739978; Tue, 24 Jul 2018 01:58:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532422739; cv=none; d=google.com; s=arc-20160816; b=giQvTjgEm9IrC5XoO1QKVokrTA3QX10SCNR1+CLWUl5n3OLpun6ZOJlst768LGQ7NG 9W8cbe9tTghz9FtpfUiiIlwhbizYX5z55Z9T+m7nGDPpePPbWq+Ow5MmD7MoLiPMxMeO jPnFlVhlGkt+IgDY0bszKEULmvE1KoIV0bNTNjsK6FNp3p3CtAEJDTGCLFyoZXPK0BrA Sdq9/JRNiB+qoNmlCJQWwopOTu+VaaV0dzKOaPqraS8clAWK38wR8vldn9aSpbct8xO4 JDr1lqrFBPgUiNwghNnJaF7BpeZcmRTmq74YER9urCwv91V6FCmHl1QotS23+RkUkssT cq6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:from:cc:to:subject :content-transfer-encoding:mime-version:references:in-reply-to:date :arc-authentication-results; bh=EUtxdLZoUplUBCtO0LqAZOR6h/xZIlFti2thAfELdF0=; b=ifmGN44cw7hYrhH4IZVBSac03INOlM6FOwKou66T5g/8bVGhyfQQupAvNeKzf+nSqT 8+k3zhU12zcRPkmah2UfiQciW5F4WdUix2Itb2V9uw9lZvCtvfUb/OdlEhKXt8MvSaDp vzu34yY5a38tOZECGM0LX0HVOcjxaq3ihZPFTJ+G3iDMun4SyH4cWv3TtWjIjzPknbe+ JfXHmnLY8jb94aTeCPqII7qhjihBfaHKRro7t4VnCrBRsAlPzKJczgM0bDVHW2vpm1ku v7/MKrLDxUrpZgr8R0gKAJvuwBsBa3DtMC6kumM+AvQsCGgskZx7R6SSNq2DL7PkhBqx HCnw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e17-v6si9204775pgv.615.2018.07.24.01.58.45; Tue, 24 Jul 2018 01:58:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388251AbeGXKDE convert rfc822-to-8bit (ORCPT + 99 others); Tue, 24 Jul 2018 06:03:04 -0400 Received: from hermes.aosc.io ([199.195.250.187]:42999 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388136AbeGXKDE (ORCPT ); Tue, 24 Jul 2018 06:03:04 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 7F2959F71F; Tue, 24 Jul 2018 08:57:32 +0000 (UTC) Date: Tue, 24 Jul 2018 16:57:25 +0800 In-Reply-To: <20180724085639.2cebno52qfxrzmdw@flea> References: <20180724011551.49603-1-icenowy@aosc.io> <20180724011551.49603-3-icenowy@aosc.io> <20180724085639.2cebno52qfxrzmdw@flea> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Subject: Re: [PATCH 2/3] arm64: allwinner: dts: h6: add pinmux for MMC1 To: Maxime Ripard CC: Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com From: Icenowy Zheng Message-ID: <6F2D0379-C4D1-49AA-B089-7FFE27258E79@aosc.io> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 于 2018年7月24日 GMT+08:00 下午4:56:39, Maxime Ripard 写到: >On Tue, Jul 24, 2018 at 09:15:50AM +0800, Icenowy Zheng wrote: >> The MMC1 controller on H6, in the reference design and most third >party >> design, is used to connect SDIO Wi-Fi. >> >> Add pinmux for it. >> >> Signed-off-by: Icenowy Zheng >> --- >> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi >b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi >> index cfa5fffcf62b..ba1a3a3e2149 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi >> @@ -134,6 +134,14 @@ >> bias-pull-up; >> }; >> >> + mmc1_pins: mmc1-pins { >> + pins = "PG0", "PG1", "PG2", "PG3", >> + "PG4", "PG5"; >> + function = "mmc1"; >> + drive-strength = <30>; >> + bias-pull-up; >> + }; >> + > >Is that the sole muxing option for MMC1? If so, it should be added to >the mmc1 node. Oh... yes, it is. Will do in v2. > >Maxime