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[209.132.180.67]) by mx.google.com with ESMTP id v17-v6si11649806pgk.135.2018.07.24.03.45.07; Tue, 24 Jul 2018 03:45:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388486AbeGXLtQ (ORCPT + 99 others); Tue, 24 Jul 2018 07:49:16 -0400 Received: from mout.perfora.net ([74.208.4.194]:42917 "EHLO mout.perfora.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388413AbeGXLtP (ORCPT ); Tue, 24 Jul 2018 07:49:15 -0400 Received: from localhost.localdomain.toradex.int ([46.140.72.82]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPA (Nemesis) id 0MXoiP-1fSukT3bCJ-00WnhR; Tue, 24 Jul 2018 12:43:19 +0200 From: Marcel Ziswiler To: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Marcel Ziswiler , Thierry Reding , Jonathan Hunter , Rob Herring , Mark Rutland Subject: [PATCH 02/15] ARM: tegra: apalis-tk1: reorder pcie properties Date: Tue, 24 Jul 2018 12:42:56 +0200 Message-Id: <20180724104309.21741-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180724104309.21741-1-marcel@ziswiler.com> References: <20180724104309.21741-1-marcel@ziswiler.com> X-Provags-ID: V03:K1:OjAYC1ca8VUIGaNPHgULUiaa5xnCQrs+1upUvY1YnkBbb0TiOOx mFrKI8OVPiDEH3UL8xiR/3/Bg4aSD8L3xxKKP8zqo5tjAlfiFae9Kjwli1DBIZkE00gX9Ih E6y8cLGFunTrPZwI6UUBapY5vRn55ne4capEQ/WnedITsDcVM/IHXrdlnfCKO8iVJCXgX4u rq8BWYTLLBV8j5lGCt/Lw== X-UI-Out-Filterresults: notjunk:1;V01:K0:cFFymDWig/8=:BO62TWZZMVYFE1ynrCK4Yi KGp5EK5r8w3IqXH4dquHVnpDJt4a0mdbjVOfFP4M/AnmIlEGczOn/rBav5UM8Rbe1ROgEQIVp wcxFou4v7Mw9cKSYzShhldBaAPtU/JanchwwLeXNNZQHFIAlc8B8dU6dnGe8ee/Ao36U7/6ED lHads8Z92f4rc5ypQ3nw4kscS9i/BOQwin1loPXO8v8+ymedWfMDr4ZKkmBITbgpNMr3h9hDP 8aH7hz1eF79iEKddiwpBbl5cUIxXAONAIE15Ms6vefIRZQrQ5wt+naSFCzLVYpY6YTEophzVU 8JGWqtpAeDpB7e4u4O9bqTT0E/wA6MB8KMcXDawhAkJtDpPIfoHSXUDYza20aw+0AEeqCBvDs bmMJMaaTXgQG04xOEtNmrEQ30EiXqcuTt7pbVEFm0k1o/WhVQEbmsgqvnG/n93jvQcEhimJWb lT6XoApLcDUvHW6xjRD1+cLXpnSPHH8pM62gM1Hdplkh/l84ZjeZ5DRqY5jGFMMfb99tIRIYO xex1ZsrUQW72IhW+/HRg6svFHrgf96AajXDQ9UHHjUVEDmMmV4s/FykHKwhgcSqh5+6086EOt qhVMwlYm0IsGzXy3gH8gk9JSUERF4VyLboc7mqX+zY9Q1k8PYM0ANN8+ejPkvfS46KKEpqzL/ 1D/fR4ADN6ZpH1I0xCHBIGx/MbzIhYQzPDAM8xPaNTL8IR+tA4F5h865tLibvoRQRqdg= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marcel Ziswiler Reorder PCIe properties. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +- arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi index 09e3641258ae..cb7e53c86408 100644 --- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi @@ -39,9 +39,9 @@ /* I210 Gigabit Ethernet Controller (On-module) */ pci@2,0 { + status = "okay"; phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>; phy-names = "pcie-0"; - status = "okay"; pcie@0 { reg = <0 0 0 0 0>; diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index 5e7ae5e92fb8..d73ee974648a 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -74,9 +74,9 @@ /* I210 Gigabit Ethernet Controller (On-module) */ pci@2,0 { + status = "okay"; phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>; phy-names = "pcie-0"; - status = "okay"; pcie@0 { reg = <0 0 0 0 0>; -- 2.14.4