Received: by 2002:ac0:a5a7:0:0:0:0:0 with SMTP id m36-v6csp7047919imm; Tue, 24 Jul 2018 07:36:00 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfDV9AiELnYVyYpZ7ZCSLG3FEVeKRDClsdWZHXkb9nJdO6eahG3FyGClhEzk94SuazDhShI X-Received: by 2002:a63:1126:: with SMTP id g38-v6mr16427428pgl.122.1532442960836; Tue, 24 Jul 2018 07:36:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532442960; cv=none; d=google.com; s=arc-20160816; b=eF67Df7Gm0bCujOAX1S2s4y9+iIMDhR0s+YF7opJyf1mW0YLXfyQd2VX2c4c65l4en a1ZITk70Q3/26tEaIboe2L951HfCfmifGX5jLl4B1WJSQ4QTZD+l+uwCmqikGMt7G+Lp hTYd1JsZ2xX/mlpctQZ4UMpKrAy2nou97C2YOQLaY1O3wp+yd4sfK2+GwobEOpmHR9OC Q/Psar4RErZXfBnVAUh1PZlKLRQTF9ezoAjIACwD4MAodWWUHcikxQC9WKVyFpSBewQl dEtila+551OLmpnZBlVqB8TaJFLb+9SqSxxBW5eeCEasKUvMGSpBUP8lrCwHDgg64fRc CI/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=FwEg8MaDeJXpsUAkMbkBsqu1W4QC6t/Co0e3H0qKw48=; b=EzUMaWUh9sx7zxt76Ab5ACFz+AIhBwMQdMk5gqbcpgWY8Uhj/z1QAncJ4W2yf1+RtS WB4BRtjFWe5gv78AgVAjrzdoM/Hh6IoPh+dJFLOBBEqC5eCXl2hgotIjYcgnOafMa0aD +S7mKwcf10UQx6vS6IP1pAUHp6u1LjnikbhubLx3ICxbyFhVsHvlqaLdxalzAqctnkv2 B5+i3hmQQCtk3mLvGMdZd4jXwtKKy+i6sK9tAydMDQKf5iAW514V6sgfWd5F4tgoadM3 XZPuU2pTX6N6nEcCPdmU0N8cTf+lyWao5ylI7RacfZ3kRd258Aw0tBO9DmGZmFlHAmv9 3IOQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o11-v6si10192039plk.421.2018.07.24.07.35.46; Tue, 24 Jul 2018 07:36:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388699AbeGXPle (ORCPT + 99 others); Tue, 24 Jul 2018 11:41:34 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:17793 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388373AbeGXPle (ORCPT ); Tue, 24 Jul 2018 11:41:34 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1, AES128-SHA) id ; Tue, 24 Jul 2018 07:34:39 -0700 Received: from HQMAIL106.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 24 Jul 2018 07:34:43 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 24 Jul 2018 07:34:43 -0700 Received: from HQMAIL112.nvidia.com (172.18.146.18) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 24 Jul 2018 14:34:47 +0000 Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL112.nvidia.com (172.18.146.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 24 Jul 2018 14:34:47 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Tue, 24 Jul 2018 14:34:47 +0000 Received: from dhcp-10-21-25-168.Nvidia.com (Not Verified[10.21.25.201]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 24 Jul 2018 07:34:46 -0700 From: Aapo Vienamo To: Ulf Hansson , Rob Herring , Mark Rutland , Thierry Reding , Jonathan Hunter , "Adrian Hunter" , Mikko Perttunen CC: , , , , Aapo Vienamo Subject: [PATCH 08/10] arm64: dts: tegra210: Add sdmmc pad auto calibration offsets Date: Tue, 24 Jul 2018 17:34:24 +0300 Message-ID: <1532442865-6391-7-git-send-email-avienamo@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532442865-6391-1-git-send-email-avienamo@nvidia.com> References: <1532442591-5640-1-git-send-email-avienamo@nvidia.com> <1532442865-6391-1-git-send-email-avienamo@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the calibration offset properties used for automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index bc1918e..467bdfc 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -1051,6 +1051,10 @@ pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; pinctrl-0 = <&sdmmc1_3v3>; pinctrl-1 = <&sdmmc1_1v8>; + pad-autocal-pull-up-offset-3v3 = <0x00>; + pad-autocal-pull-down-offset-3v3 = <0x7d>; + pad-autocal-pull-up-offset-1v8 = <0x7b>; + pad-autocal-pull-down-offset-1v8 = <0x7b>; status = "disabled"; }; @@ -1062,6 +1066,8 @@ clock-names = "sdhci"; resets = <&tegra_car 9>; reset-names = "sdhci"; + pad-autocal-pull-up-offset-1v8 = <0x05>; + pad-autocal-pull-down-offset-1v8 = <0x05>; status = "disabled"; }; @@ -1076,6 +1082,10 @@ pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; pinctrl-0 = <&sdmmc3_3v3>; pinctrl-1 = <&sdmmc3_1v8>; + pad-autocal-pull-up-offset-3v3 = <0x00>; + pad-autocal-pull-down-offset-3v3 = <0x7d>; + pad-autocal-pull-up-offset-1v8 = <0x7b>; + pad-autocal-pull-down-offset-1v8 = <0x7b>; status = "disabled"; }; @@ -1087,6 +1097,8 @@ clock-names = "sdhci"; resets = <&tegra_car 15>; reset-names = "sdhci"; + pad-autocal-pull-up-offset-1v8 = <0x05>; + pad-autocal-pull-down-offset-1v8 = <0x05>; status = "disabled"; }; -- 2.7.4