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[209.132.180.67]) by mx.google.com with ESMTP id x21-v6si11792122pll.24.2018.07.24.09.19.39; Tue, 24 Jul 2018 09:19:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388445AbeGXR0E (ORCPT + 99 others); Tue, 24 Jul 2018 13:26:04 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33322 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388319AbeGXR0D (ORCPT ); Tue, 24 Jul 2018 13:26:03 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D64D83084038; Tue, 24 Jul 2018 16:18:50 +0000 (UTC) Received: from t450s.home (ovpn-116-105.phx2.redhat.com [10.3.116.105]) by smtp.corp.redhat.com (Postfix) with ESMTP id 98984100164C; Tue, 24 Jul 2018 16:18:50 +0000 (UTC) Date: Tue, 24 Jul 2018 10:18:48 -0600 From: Alex Williamson To: linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-nvme@lists.infradead.org Subject: Re: [PATCH v3 3/3] PCI: Intel DC P3700 NVMe delay after FLR quirk Message-ID: <20180724101849.36f635eb@t450s.home> In-Reply-To: <20180724161446.2729.78211.stgit@gimli.home> References: <20180724160440.2729.75178.stgit@gimli.home> <20180724161446.2729.78211.stgit@gimli.home> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Tue, 24 Jul 2018 16:18:50 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 24 Jul 2018 10:14:46 -0600 Alex Williamson wrote: > Add a device specific reset for Intel DC P3700 NVMe device which > exhibits a timeout failure in drivers waiting for the ready status to > update after NVMe enable if the driver interacts with the device too > quickly after FLR. As this has been observed in device assignment > scenarios, resolve this with a device specific reset quirk to add an > additional, heuristically determined, delay after the FLR completes. > > Signed-off-by: Alex Williamson > --- > drivers/pci/quirks.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) I forgot to link the bz in this one, if this somehow becomes the final version, please add: Link: https://bugzilla.redhat.com/show_bug.cgi?id=159265 Thanks, Alex > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index 3899cdd2514b..08fafd804588 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -3751,6 +3751,27 @@ static int nvme_disable_and_flr(struct pci_dev *dev, int probe) > return 0; > } > > +/* > + * Intel DC P3700 NVMe controller will timeout waiting for ready status > + * to change after NVMe enable if the driver starts interacting with the > + * device too quickly after FLR. A 250ms delay after FLR has heuristically > + * proven to produce reliably working results for device assignment cases. > + */ > +static int delay_250ms_after_flr(struct pci_dev *dev, int probe) > +{ > + if (!pcie_has_flr(dev)) > + return -ENOTTY; > + > + if (probe) > + return 0; > + > + pcie_flr(dev); > + > + msleep(250); > + > + return 0; > +} > + > static const struct pci_dev_reset_methods pci_dev_reset_methods[] = { > { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF, > reset_intel_82599_sfp_virtfn }, > @@ -3759,6 +3780,7 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = { > { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_M2_VGA, > reset_ivb_igd }, > { PCI_VENDOR_ID_SAMSUNG, 0xa804, nvme_disable_and_flr }, > + { PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr }, > { PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID, > reset_chelsio_generic_dev }, > { 0 } >