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[209.132.180.67]) by mx.google.com with ESMTP id bb5-v6si10887813plb.480.2018.07.24.12.53.07; Tue, 24 Jul 2018 12:53:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=MHjK8aXO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388674AbeGXVAI (ORCPT + 99 others); Tue, 24 Jul 2018 17:00:08 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:34982 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388450AbeGXVAH (ORCPT ); Tue, 24 Jul 2018 17:00:07 -0400 Received: by mail-pg1-f195.google.com with SMTP id e6-v6so3611593pgv.2 for ; Tue, 24 Jul 2018 12:52:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=ZPAd1sp+UuG7JBscgilTU+f5/Y/VMPkc7LXxVNCkEz0=; b=MHjK8aXOVijjxBCCfVmoaEEEYhNQQsxWN/U8tSzCyOugMF8ybTeCB/eivfsthchEtA /rBRpKZUSX2WJ1s8xAVmo05NAgQLPnHyVMcbUEI2cSxzj+bCG98jOALjcBCOsVXChvH0 wQWrWIxxRLDu1rTcR9qvjJpKGMsJTIohCMJrug8S/+dHrtDOkoJpYjskeqrB0Y8GPYvJ YFX55O3jTgn5Ic+gmL1BI1lV9JX/+VobQhPblItTtHdJiLSLbxLqta/29zxdeWIUpMlv Bj8NLDqYdsh4fsdIY+7D3SboEWAAZUMzqbUu1AOm7b5jRXq8txmAWZk5KlW5dAREZ0Hr JG/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=ZPAd1sp+UuG7JBscgilTU+f5/Y/VMPkc7LXxVNCkEz0=; b=bB655eGsaBq/6UH5z7bEdLVsWM0W06stFoznj92keo8vOpgkQHI58YH9QLwSwCNEmt bOXbq4V1bVNPBniAnS89MXqfoglbPZSqYMVS8ngl5lzSuCuavIGU59nA/9MegjPBDA9M rREZMFsJGCyHqK+ViiUzRZ+f+0kTm/N5UY/ApzNGekayTLJRWrzwBVfl5aBODugKTZtV zo2QCGSnUNrkQu9jQnsoukQdUg7+v9pKFHLsXUq7Sqrl2ASOR5qpn7Z4u1M2kUOCtQAo vYnepLylnSFMJFH08lf++tLJORQwc8m01aFoKsN+5Ui01CLkB/9CYRXqfm+r3U0fe/42 7Y6g== X-Gm-Message-State: AOUpUlE2k1fjn9PIhR4chtFhw2/ifJzrcYTTTL2gy0yt5KS8p2Ikc/ba Gmb6Loc+LYMWWM/fArdCNDY= X-Received: by 2002:a62:a018:: with SMTP id r24-v6mr19117461pfe.144.1532461925746; Tue, 24 Jul 2018 12:52:05 -0700 (PDT) Received: from ban.mtv.corp.google.com ([2620:0:1000:1501:bc2f:3082:9938:5d41]) by smtp.gmail.com with ESMTPSA id r23-v6sm16573058pfj.5.2018.07.24.12.52.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 24 Jul 2018 12:52:04 -0700 (PDT) Date: Tue, 24 Jul 2018 12:52:02 -0700 From: Brian Norris To: Boris Brezillon Cc: Zhiqiang Hou , linux-mtd@lists.infradead.org, Linux Kernel , David Woodhouse , Boris BREZILLON , Marek Vasut , Richard Weinberger , Cyrille Pitchen , NeilBrown Subject: Re: [PATCHv3 2/2] mtd: m25p80: restore the status of SPI flash when exiting Message-ID: <20180724195202.GB190016@ban.mtv.corp.google.com> References: <20171206025342.7266-1-Zhiqiang.Hou@nxp.com> <20171206025342.7266-3-Zhiqiang.Hou@nxp.com> <20180723181350.GA58212@ban.mtv.corp.google.com> <20180723221002.736e0830@bbrezillon> <20180724011811.40165a35@bbrezillon> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180724011811.40165a35@bbrezillon> User-Agent: Mutt/1.10.1+48 (1f3a9df87d11) (2018-07-22) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Boris, On Tue, Jul 24, 2018 at 01:18:11AM +0200, Boris Brezillon wrote: > On Mon, 23 Jul 2018 15:06:43 -0700 > Brian Norris wrote: > > On Mon, Jul 23, 2018 at 1:10 PM, Boris Brezillon > > wrote: > > > but it still seems to improve things. Of course, that means the > > > user should try to re-route all HW reset sources to SW ones (RESET input > > > pin muxed to the GPIO controller, watchdog generating an interrupt > > > instead of directly asserting the RESET output pin), which is not always > > > possible, but even when it's not, isn't it better to have a setup that > > > works fine 99% of the time instead of 50% of the time? > > > > Perhaps, but not at the expense of future development. And > > realistically, no one is doing that if they have this hack. Most > > people won't even know that this hack is protecting them at all (so > > again, they won't try to mitigate the problem any further). > > Unless we add a huge backtrace at probe time which forces them to look > closer at what they did wrong (like you seem to suggest below). Sure, if we can force a huge backtrace, then maybe that's an acceptable situation. I just predict that someday, somebody will argue that the warning should be downgraded, since there's nothing the average user can do about it. (Well, except not buying from that manufacturer in the future.) > > Or even better: put this hack behind a DT flag, so that one has to > > admit that their board design is broken before it will even do > > anything. Proposal: "linux,badly-designed-flash-reset". > > I think we can remove the "linux," prefix. If it's badly designed, it > applies to all OSes, don't you think? Sure. Shall I send a patch? Brian